【作者】 王锋；

【导师】 苗澎；

【作者基本信息】 东南大学 ， 电路与系统， 2017， 硕士

【摘要】 随着数字通信技术和无线传感器网络的不断发展,人们对应用于其中的关键模块——模数转换器(Analog to Digital Converter,ADC)的要求越来越高。高速、高精度、低功耗成为模数转换器研究领域的热点。在各种类型的模数转换器架构中,sigma-deltaADC以速度换精度并结合噪声整形技术使得高精度的实现变得相对简单,sigma-delta ADC几乎成为了高精度ADC的代名词。离散时间(Discrete Time,DT)sigma-delta调制器在速度、精度、带宽以及功耗等方面有较好的折衷,加上其对模拟器件的匹配性能要求较低,在音频信号处理等领域得到了持续的发展,并在近些年来逐步扩展到生物医学信号及工业信号探测传感等领域。本文对一款适用于音频信号、生物信号及工业信号探测传感器的sigma-deltaADC(信号带宽为200kHz,精度14bit)的调制器部分进行研究。本文在介绍了当前模数转换器的研究现状、ADC的基本原理和sigma-delta ADC的主要性能指标的基础上,分析比较了 sigma-delta调制器的四种结构,进而初步确定了本次设计采用的结构——二阶单环结构。在设计中首先利用Matlab/Simulink工具对二阶sigma-delta调制器进行了完整的行为级建模,并考虑进时钟抖动、开关热噪声、运放的非线性因素等电路中的主要非理想因素,以此作系统级的仿真和优化,验证系统的可行性和模型的正确性。为实现模拟电路模块及系统性能与其物理实现之间的优化设计,本次设计还基于Verilog-A进行了各个模块及系统的建模。论文采用0.18μm CMOS标准工艺完成了二阶调制器的晶体管级电路设计,包括两相非交叠时钟、自举开关、两级运算放大器、开关电容积分器、比较器、反馈DAC等,完成了版图设计和后仿真。后仿真结果表明,在1V、115.967 kHz的正弦输入信号下,二阶调制器可实现的精度为13.72 bit,和14 bit的精度指标相比有所欠缺。最后基于14 bit精度指标的要求,对电路进行了改进,设计了三阶sigma-delta调制器并完成了行为级仿真、电路设计及前仿真。前仿真结果表明,在1V、115.967 kHz的正弦输入信号下,三阶调制器在满足其他主要指标的情况下,精度达到15.8 bit,为最终实现14 bit精度要求留下了足够的裕量。更多还原

【Abstract】 With the continuous development of digital communication technology and wireless sensor network,people are demanding more and more on analog-to-digital converters.High-speed,high-precision and low power consumption have become the important research trends in the field of data converters.In all types of ADC architectures,sigma-delta ADC achieves high accuracy with a trade-off of speed accuracy and noise shaping.The sigma-delta ADC is almost synonymous with the high-precision ADC.Discrete-Time sigma-delta modulators provide a good trade-off between speed,accuracy bandwidth,and power consumption,in addition to their insensitivity to matching of analog devices.So that it gets favor of many ADC developers in the field of audio application and in recent years has ushered in biological and industrial field.In this paper,a modulator part of a high-precision ADC for audio signal,biological signal and industrial signal sensor is studied and designed.The baseband frequency is 200 kHz and the precision is 14 bits.In this paper,the current research situation of analog-to-digital converter is introduced firstly,then the basic principle of ADC and the main performance index of sigma-delta ADC are introduced,and the four kinds of sigma-delta modulator are analyzed and compared.On this basis,the structure adopted in this design--second order single loop structure was determined.The second-order sigma-delta modulator is then modeled using the Matlab/Simulink tool,taking into account the main non-ideal factors such as clock jitter,switching thermal noise,op amp nonlinearities,etc.As a system-level,the feasibility of the system and the correctness of the model are verified.On the basis of behavioral modeling,in order to make the model and circuit design converge better and save the simulation time,this design also uses Verilog-A to model each module,and the simulation result is easy to carry out and the circuit design result to be compared.The design of the ADC circuit is simulated by TSMC 0.18μm process,the transistor-level circuit design of the modulator is presented,including two-phase non-overlapping clock,bootstrap switch,two-stage operational amplifier,switched capacitor integrator,comparator and feedback DAC,etc.Complete the layout design and post-simulation.The simulation results show that the second-order modulator can achieve the accuracy of 13.72 bit under the sinusoidal input signal of 1 V and 115.967 kHz,lack of accuracy compared to 14-bit precision index.Finally,based on the requirements of 14 bit precision index,the circuit is improved,the third-order sigma-delta modulator is designed and the behavior level simulation,circuit design and pre-simulation are completed.The results of the previous simulation show that the third-order modulator achieves 15.8 bits when the other main indicators are satisfied,under the sinusoidal input signal of 1 V and 115.967 kHz,leaving enough margin for the final 14-bit requirement.更多还原