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基于忆阻器的加法器设计及其仿真分析

Design and Simulation Analysis of Memristor-based Adder

【作者】 邓辉

【导师】 王小平;

【作者基本信息】 华中科技大学 , 控制工程, 2016, 硕士

【摘要】 随着晶体管特征尺寸的逐步减小,集成电路的尺寸和计算性能逼近极限,CMOS的发展面临着巨大的挑战。忆阻器作为一种新兴纳米电子器件,不但能构成交叉开关,且具有记忆特性,是替代CMOS的理想材料之一。逻辑运算和算术运算是计算机的基本功能,加法运算是算术运算的基础,用加法器实现。因此,设计基于忆阻器的加法器具有重要的理论意义和实践价值。本文的研究围绕基于忆阻器的加法器设计展开,环环相扣,逐步推进。首先,论文详细介绍了忆阻器的基本理论、电气特性、工作原理和常用忆阻器模型并进行了仿真分析。根据忆阻器的电阻开关效应和阻变特性,介绍了基于忆阻器的与门、或门、非门等逻辑门电路的设计方法,提出了基于忆阻器的异或门和同或门,并将它与已有的逻辑门实现方法进行了比较分析。在此基础上,分析了传统加法器中半加器和全加器的逻辑组合,设计了基于忆阻器的半加器与全加器,并通过PSPIC E仿真软件进行了验证。最后,通过研究传统n位加法器中串行和并行的进位方式,利用逐位进位的方式将所设计的全加器串联起来,提出了一种改进n位加法器的设计方法,利用PS PICE仿真软件进行了仿真验证,分析并对比了它和现有加法器的速度和耗材等性能,结果表明所设计的n位加法器具有电路结构简单、速度快、功耗低、容错性和稳定性高等优点。本文设计了一种性能优异的n位加法器,为基于忆阻器的算术运算的研究提供了思路,也为未来突破存储和运算分离的冯·诺依曼架构、延续摩尔定律提供了一种解决方案。

【Abstract】 As the size of transistor is keeping decreasing, the size and calculated performance of integrated circuit is close to the limit and the development of CMOS technology faces great challenges. As a new nano-electronic device, memristor, which not only can make up a crossbar but also provides memory characteristics, is considered a promising competitor to replace CMOS. Logic operation and arithmetic operation are the basic operation functions of traditional computer, while arithmetic operation is based on addition. So, the design of memristor-based n-bits adder makes sense to both theory and reality.Revolving around memristor-based adder, our research moves towards increasing sophistication. Firstly, a detailed introduction on the basic theory, electrical characteristics, working principle of the memristor and its models is made and the analysis results are validated by simulation results. On the basis of switch effect and resistive performance of memristor, memristor-based AND gate, OR gate and NOT gate are introduced, a kind of memristor-based XOR gate and X NOR gate is developed. Then based on these logic gate circuits, a new circuit design of half adder and full adder is introduced according to the analysis of traditional adder and the design is validated by simulation results. At last, by studying traditional ways of carry process in serial-carry adder and parallel-carry adder, an improved n-bits adder is put forward based on serial-carry adder, which consists of memristors and switches. By comparing the speed and consumable in different n-bits adders, the conclusion is drew that the proposed adder has benefits of simper architecture, higher speed, lower power consumption, high fault tolerance and high stability.This thesis provides a memristor-based n-bits adder as a solution to the future alternative Computation-In-Memory architecture as well as new ideas in memristor-based arithmetic operation.

【关键词】 忆阻器非易失性算术运算加法器
【Key words】 MemristorNonvolatilityArithmetic OperationAdder
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