【作者】 张凯；

【导师】 李智群；

【作者基本信息】 东南大学 ， 电子科学与技术， 2015， 硕士

【摘要】 随着有源电子扫描阵列(AESA, Active Electronic Scanning Array)技术的迅速发展,采用AESA技术的有源相控阵系统对射频收发前端的要求越来越高。相控阵多功能芯片(Multi-function Chip, MFC)作为解决下一代低成本、高集成度、多功能射频收发前端的有效技术途径之一,目前正在被工业界、军品界广泛的采用。多功能芯片是指将AESA收发前端原本由多个MM1C完成的移相、衰减、放大等功能集成在一颗MMIC芯片上实现。微电子技术的发展,尤其是CMOS工艺的日趋成熟,为实现高集成度、低成本的相控阵多功能芯片提供了新的契机。本文采用0.18μm RF CMOS工艺设计和实现了应用于C波段AESA射频收发芯片的中频模块。本文首先介绍了中频模块的总体结构以及中频模块使用的可变增益放大器、驱动放大器、巴伦电路的基本理论。接收中频模块包含有源双转单巴伦和中频驱动放大器,其中有源双转单巴伦采用两级结构,第一级电路将差分电压信号转换成同相电压信号,第二级电路实现了同相电压信号电流域相加；中频驱动放大器采用AB类共源共栅放大器结构,在保证线性度的同时实现了输出匹配。发射中频模块包含有源单转双巴伦和可变增益放大器,其中有源单转双巴伦采用交叉耦合技术提高增益,降低功耗；可变增益放大器采用跨导可变的开环结构降低噪声,同时实现了较大的带宽。论文给出了中频模块前仿真、版图设计和后仿真,并完成流片测试。在片测试结果表明：在3.3V电源电压下,接收状态,工作电流约为30mA,电压增益为2.01dB,带内波动小于1dB,输出1dB压缩点为8.5dBm,在1.3-1.4GHz工作频段内S22小于-15dB；发射状态,工作电流约为30mA,带内波动小于1dB,输入1dB压缩点为-2dBm,在1.3-1.4GHz工作频段内S11小于-15dB。本文设计的中频模块具有匹配良好、线性度高、单端口收发等优点,芯片工作性能稳定,可应用于C波段射频收发芯片中。更多还原

【Abstract】 With rapid development of active electronically scanned array (AESA) technology, the requirement of RF front-end in active phased array transceiver systems is higher and higher. As a technology solution to the next generation of highly integrated, multi-functional and cost-effective transceiver front-end, multi-function chip (MFC) is widely adopted in industry and military. MFC RF transceiver front-end refers to an integrated MMIC containing all the functions, like phase shift, attenuation, amplification, originally done by multiple MMICs. The development of microelectronics technology, especially in CMOS, makes it possible for the realization of highly integrated, low-cost multi-function phased array chip.This paper presents the circuit design of IF module for C-band transceiver in 0.18μm RF CMOS technology. At first, it introduces the overall structure of the IF module and the basic theory of VGA, PA and balun. IF module in receiving link contains an active two-stage differential to single-end balun (D2S balun) and an IF driver amplifier with CSCG structure biased in class AB for better linearity and output match. The first stage of D2S balun converts the differential voltage signal into in-phase voltage signal and the second stage achieves the summation of in-phase voltage signal in current region. IF module in transmitting link contain a single-end to differential balun with cross-coupling capacitor and an open-loop VGA with variable transconducrance. The on-chip test results show 2.01dB voltage gain,8.5dBm output 1dB compression point, less than -15dB S22 at working frequency of 1.3～1.4GHz, less than 1dB band fluctuation while drawing about 30mA from a 3.3V supply in receiving state. It shows -2dBm input 1dB compression point, less than 1dB band fluctuation, less than -15dB S22 at working frequency of 1.3～1.4GHz while drawing about 30mA from a 3.3V supply in transmitting state.The design has the advantages of well match, high linearity, one port receiving and transmitting signal, etc. The chip shows a stable performance and can be used in C-band RF transceiver chip.更多还原