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CMOS电荷泵锁相环的分析与设计

Analysis and Design of a CMOS Charge Pump PLL

【作者】 王珊珊

【导师】 宋明歆;

【作者基本信息】 哈尔滨理工大学 , 电子科学与技术, 2015, 硕士

【摘要】 在当今社会,电子产品风靡全球,锁相环作为各种电子产品的重要组成部分,应用在生活的各种领域,它的性能的好坏也显得至关重要。通过阅读大量文献,重点综述了锁相环的发展历程和应用状况,以及国内外的发展情况和未来的发展趋势;分析了锁相环的基本机构和工作原理,并通过数学建模对电荷泵锁相环的每个模块,包括鉴频检相器、电荷泵、低通滤波器、压控振荡器和分频器进行了建模,在此基础上着重对电荷泵锁相环的功耗、噪声、跟踪性能、捕获性能和稳定性等进行了详细解析。为了得到更优性能的电荷泵锁相环,又从电路级对电荷泵锁相环的各个组成部分的工作原理、特性和典型电路的优缺点进行了具体分析,尤其对现在应用比较广泛的各种电路模块进行了具体说明,并且有选择的进行了仿真和分析;最终通过对各电路模块性能的折中分析,选取了改进后的性能较理的电路模块。本文通过大量计算和仿真,选用改进后的预充电鉴频检相器、32分频的分频器、二阶环路滤波器和由差分对构成的压控振荡器,使用软件对各个电路模块进行了仿真分析,并且设置工作电压为3V,在参考频率为20MHz时,使输出频率达到640MHz,实现了启动6μs即可进行锁定。最终的仿真结果验证了设计的理论建模。

【Abstract】 In today’s society, electronic products swept the world, the Phase Locked Loop(PLL) which is an important part of electronic products, has been used in various fieldsof life. As so its performance is crucial.After study of a large number of reference material, this paper first give a briefintroduction to the development and application of PLL. Especially the domesticdevelopment situation and future trend of phase locked loop were introduced.Then the basic structure and working principle of phase locked loop were introduced,too.Through the mathematical modeling of charge pump phase locked loop for each module,including frequency phase detector, charge pump, a low pass filter,voltage controlledoscillator and a frequency divider modeling. On this basis of charge pump phase lockedloop of power consumption, noise, tracking performance, capture performance andstability has been analyzed, this paper proposed the methods of noise suppression.In order to get PLL’s performance better, the paper chose Charge Pump PhaseLocked Loop (CPPLL) structure for study. One chapter was used to introduce the fiveimportant parts of CPPLL, include Phase Frequency Detector(PFD), Charge Pump(CP),Loop Oscillator(LO), Voltage Controlled Oscillator(VCO) and divider, their workingprinciples characteristics and typical circuits are introduced. Then through the analysisof various performance, we ultimately select the ideal performance of the improvedcircuit block.Circuit simulation is carried out by Cadence and Spice. In this paper, after a largenumber of calculations and simulations, components were selected as precharged phasefrequency detector,32divider, second order loop filter and voltage controlled oscillatorconstituted by a differential pair. Working voltage is3V, when the reference frequency is20MHz, the output frequency reaches640MHz. And achieve a lock in6μm. The finalsimulation results verify our theoretical analysis.

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