【作者】 罗培强；

【导师】 戎蒙恬；

【作者基本信息】 上海交通大学 ， 电路与系统， 2007， 硕士

【摘要】 当前人类进入了以音视频为载体的多媒体信息时代,信息数据量骤然膨胀,通信和存储的便捷性及高效性成为人们追求高质量生活的必然要求,从而高效的通信和存储接口自然成为市场和研究的热点。本文致力于当前最具活力的信息存储和交换的接口—USB2.0接口的收发器的研究设计,实现了支持480Mb/s高速模式数据传输的收发器。USB接口的经历了低速到高速的发展,其目的是提供更高的传输效率。而高速度信号传输对电路设计提出了更高的要求,以保证信号的完整性。低速收发器只需提供足够的驱动能力即可,高速情况下,则必须考虑工艺参数的不确定性和工作温度变化对收发器输出阻抗的影响,因为输出阻抗的变化会导致阻抗失配而引起信号衰减问题;还要考虑信号对噪声的敏感性而引起收发器误判决的问题,因为传输线很容易从环境中耦合大量噪声;还有就是对高速串行数据如何进行有效恢复的问题。本文有针对性地进行创新设计,较好地解决了这些问题。首先是基于动态匹配的思想,提出并设计了输出阻抗可动态调整匹配的集高速和全速工作模式于一体的收发器电路。仿真表明,这种结构不仅支持两种工作模式,并且有效屏蔽工艺参数变化、工作温度变化对芯片驱动器输出电阻的影响,很好地匹配了连线的阻抗,保证信号的完整性。其次,针对高速信号容易受到环境噪声的干扰的特点,我们设计了可对信号电平的有效性进行检测的差分信号电平包络检测器,增强了高速信号对噪声的抵抗能力,保证通信和控制的可靠性。另外USB2.0协议要求收发器具有高速连接断开检测的功能,这实质上也是一种信号电平包络检测器,我们用相同的结构进行实现,增加了电路模块的复用性。最后,USB2.0高速模式通信需要稳定的时钟进行数据恢复,本文在对锁相环进行系统的研究分析后,总结出减小锁相环噪声的设计原则,同时将传统的单端控制VCO改进成双端控制,设计了具有较好稳定性的8相480MHz电荷泵锁相环时钟电路;在此基础上,改进了基于数据边缘滑动窗判决的过采样数据恢复技术,有效地提高了高速模式数据恢复的正确性。总体来说,USB是一种通信接口协议,为了提供高速有效可靠的通信,协议涵盖了对数字链接层和物理层的规定和定义。本文从协议出发,从保证信号完整性和电路稳定性角度考虑,致力于物理层的收发器电路系统的研究和设计。也正是如此,本文的设计思想和技巧具有通用性,可应用于类似的高速串行数据通信电路的设计。更多还原

【Abstract】 Now human has entered a multimedia era when information is carried in the form of audio and video, and the volume of information is exploding. As we chase for convenience and efficiency of information transportation, a highly efficient data transporting interface becomes a hotspot for both market and research. In this dissertation, the work will focus on the research and design of the most promising interface for information storage and exchange, the USB2.0 transceiver, and the high speed mode capable transceiver are implemented.In order to provide higher efficiency, the USB interface has developed from low speed mode to high speed mode. However the high speed mode imposes more critical restriction on the circuit design. In low speed case, the transceiver is designed to supply enough drive strength. But for high speed mode, much more consideration should be payed. Firstly, the impact of process parameters’uncertainty and temperature variation on the driver impedance must be taken into account, for the impedance mismatch leads to the problem of signal attenuation. Secondly, the high susceptibility of noise coupling from working environment would result in the problem of misjudgement of signal level. Lastly, how the high speed serial data bits could be recovered effectively. We will directly face to all these problems and make innovative design to resolve them.Based on the idea of dynamic matching, we design a transceiver with impedance calibration ability that supports both high speed and full speed mode. And the simulation shows that the innovative structure effectively overcomes the problem of process parameters’uncertainty and temperature variation by providing pretty well impedance match, which insures the signal integrity and complies with the specification.Impedance match is just one necessary precondition to assure reliable high speed communication. We still need some scheme to get rid of the high noise sensitivity of high speed signal. A voltage envelop detector is designed to validate the physical signal level according to the USB2.0 specification. And due to the fact of level comparison, the same circuit structure is adopted to implement the link disconnection detector in high speed mode, which exploits the reusability of circuit module.At last, after a through exploration of the phase locked loop system, some design principles are summarized in the work, and the traditional single-end controlled VCO is innovatively modified to a dual-end controlled one, and a stable 480MHz charge pump phase-locked loop with 8-phase output is designed. With these multi-phase clocks, the over-sampling data recovery technology based on data edge information and sliding window is improved, which effectively increase the correctness of data recovery in high speed mode.From a general point of view, USB is a communication interface protocol proposed for high speed, effective and reliable data transportation. The specification covers both the data link layer and the physical layer. This work emphasizes on research and design of the transceiver in physical layer with signal integrity and circuit stability in special consideration according to the specification. And the design principles and techniques can be applied to similar high speed serial data communication circuit design.更多还原