【作者】 孙波；

【导师】 江铭炎； 牛占林；

【作者基本信息】 山东大学 ， 电子与通信工程（专业学位）， 2014， 硕士

【摘要】 随着半导体技术的高速发展,CPU的芯片制程已经从三年前的32nm发展到当今的22nm。制程的提升不仅带来芯片内部半导体元件密度和数量的提升,同时也带来了芯片设计架构的优化和改进,使CPU由Nehalem架构发展到最新一代的Romley架构,CPU核心数更多,计算能力更强,支持的内存容量更大。Nehalem架构CPU最多可集成6个处理器核心,内存容量可达384G,而Romley架构CPU最多可以集成12个处理器核心,内存容量高达768G。伴随云计算技术的应用,Nehalem架构CPU已经很难满足未来高速膨胀的信息化发展要求,为了跟上行业发展速度,同时最大化满足互联网客户的定制化产品需求,需要在Intel最新平台上,开发一套基于Romley EN架构的双路服务器系统。同时,针对互联网客户的大容量低成本存储业务应用需求,目前业界已有产品在通信带宽、互联方式上的瓶颈,大大限制了服务器存储IO带宽的快速增长。传统存储业务使用的背板带宽为3Gbps,主要的互联方式有两种：直连背板、Expander扩展背板,前者由于每块硬盘单独通过一根线缆连接到控制器上,带宽可以满足,但是通信线缆的数量会伴随硬盘数量而增长,在满配12块硬盘的情况下,内部线缆最多可达12根,对系统的散热和布局会造成较大影响,可靠性较低；而后者,由于业界采用的都是3Gbps带宽的Expander芯片实现一对多的硬盘互联,在线缆数量上相比方案一大大简化,但是受限于芯片带宽瓶颈,整个系统的通信带宽将受到严重影响,从而导致性能偏低。该课题其中一部分工作就是对背板的通信带宽做优化和改进,以提升系统的整体存储性能。本文重点阐述了基于Intel Romley-EN平台双路服务器的设计与实现。最终产品可用于互联网、高校、政府、部队、教育等多个行业,对未来信息化发展具有重要推动价值和借鉴意义。更多还原

【Abstract】 With the rapid development of semiconductor technology, CPU chip process has changed to22nm from32nm in three years ago. Process improvement doesn’t only bring chip semiconductor element density and number of ascension, but also brought the optimization and improvement of chip design architecture. The CPU from the Nehalem architecture to the next generation of Romley architecture, more cpu cores, more robust performance, more capacity of memory. Westmere CPU can integrate6pieces of processor cores, memory capacity is384G, and the Romley CPU can integrate12pieces of processor cores, memory capacity up to768GWith the application of cloud computing technology, the architecture of Nehalem CPU has been difficult to meet the requirements of future information development. In order to keep pace with the development of the industry, and meet customer’s demands, we need to develop a dual CPU server based on Romley EN platform.At the same time, to meet the internet customers’large capacity and low cost storage business application demands, present products has a bottleneck on the communication bandwidth and connection method, which limit the rapid growth on10bandwidth of server storage. The legacy storage uses3Gbps bandwidth backplane for data transmission. There are two kinds of backplane, direct backplane and expander backplane. Direct backplane connects to each disk through cable, so it can meet the bandwidth, but the number of communication cables will grow with the number of disk. If I configure12disks in one system, internal cable may be up to12, it will result in greater impact on the system thermal, placement and system reliability. The latter, because the Expander chip using3Gbps bandwidth to connect multi hard disk, cable number compared to the former is greatly simplified. But limited to the chip bandwidth bottleneck, bandwidth of the whole system will be seriously affected, resulting in low performance. A part of the research is on the backplane bandwidth optimization and improvement, to improve the performance of the storage system. This paper focuses on the design and implementation of dual cpu server based on Intel Romley-EN platform. The final product can be used for the Internet, universities, government military, education and other industries. It has important value and significance for the future development of information.更多还原