【作者】 陈燕；

【导师】 陈迪平； 龚岳平；

【作者基本信息】 湖南大学 ， 电子与通信工程， 2012， 硕士

【摘要】 近年来,随着多媒体技术与物联网技术的迅猛发展,高速高精度的模数转换器(ADC)的研究也变得越来越重要。高速、高精度采样／保持电路(S/H)是ADC的核心元件。本文对高速、高精度采样／保持电路(S/H)进行了详细的研究,并且重点分析设计了其核心电路栅压自举开关与全差分运算放大器(OTA)。最终完成了一款适用于12bit100MHz Pipeline ADC的高速、高精度采样／保持电路。首先,为了提高S/H电路的精度,减小芯片的面积,选择了电容翻转式采样／保持电路。在分析了采样保持电路的三大主要误差来源之后确定了本文的设计重点便是解决开关的线性度问题与全差分运算放大器高增益与大带宽的问题。然后,考虑到栅压自举开关能有效的解决开关的线性度问题,因此重点分析和设计了一个线性度较高的栅压自举开关电路。考虑到高增益与大带宽对采样／保持电路建立过程的重要性,因此,采用两级增益自举套筒式全差分运算放大器有效的解决了全差分运算放大器高增益、大带宽的要求。最终,利用Virtuoso完成了各模块电路的版图设计。在Linux工作环境下,基于SMIC0.18um CMOS工艺库,使用Cadence工作平台中SPECTRE工具对设计的部分模块电路进行了仿真验证。结果表明,所设计的栅压自举开关能实现良好的电平跟随,所设计的全差分运算放大器达到94dB高增益,1.2GHz大带宽,74。相位裕度。所设计的采样／保持单元电路在1GHz时钟频率下能实现对100MHz输入信号的采样与保持,达到了12bit100MHz PipelineADC的应用要求。更多还原

【Abstract】 In recent years, with the rapid development of multimedia technology and the Internet of Things technology, high-speed high-precision analog-to-digital converter (ADC) has become increasingly important. High-speed, high-precision sample/hold circuit (S/H) is a core component of the ADC. This paper carried out a detailed study on the high-speed, high-precision sample/hold circuit (S/H), and focuses on analysis and design of the bootstrapped switch and fully differential operational amplifier (OTA). Finally, completed whole sample/hold circuit for high-speed, high-precision12bit100MHz Pipeline ADC.First, in order to improve the accuracy of the S/H circuit and reduce the chip area, select the flip-style capacitor sample/hold circuit. After analyses the three major sources of error of the Sample S/H circuit, I determined the design focus of this paper is to solve the switch linearity problem and the high gain and wide bandwidth fully differential op amp. Then, taking into account the gate voltage of the bootstrap switch can effectively solve the switch linearity problems, so I designed a linear bootstrap switching circuit. Taking into account the importance of high gain and wide bandwidth on the sample/hold circuit in the process of establishing, therefore, the two gain bootstrap telescopic fully differential op amp with high gain, wide bandwidth had been designed. Finally, use Virtuoso to complete the layout of each module circuit.Under Linux working environment, based on SMIC0.18um CMOS technology library, using the SPECTRE tools of Cadence on finished all the modules’simulation. The results show that the gate voltage bootstrapped switch is designed to achieve a good level to follow. The design of the fully differential op amp achieved94dB high gain,1.2GHz wide-bandwidth, phase margin of74°. Sample/hold circuit unit work well under a1GHz clock frequency and100MHz input signal, Reached the application requirements of the12bit100MHz Pipeline ADC circuit.更多还原