【作者】 张巍；

【导师】 刘金根；

【作者基本信息】 武汉理工大学 ， 物理电子学， 2013， 硕士

【摘要】 人脸检测是一个对输入的图像判定是不是有人脸存在,如果判断有人脸,就给出人脸的信息的过程。本文在对人脸检测算法和理论进行了深入分析之后,选择了基于Adaboost算法的级联检测器结构的人脸检测方法,其借助了Haar矩形特征,具有检测速度快、检测率高等优点。目前的人脸检测系统大多在计算机上采用软件实现的方法,无法满足在实际应用中小型化、实时性的工程需求,随着可编程逻辑器件的发展,结合FPGA芯片的良好的可编程结构及优秀的并行计算能力,本文采用FPGA对人脸检测系统进行实现。在开发方法上,本论文采用基于模型的FPGA技术实现,可以大大缩短传统开发的时间,缩短用硬件描述语言来开发的时间,提高精度和可靠性。本文的主要工作包括：1、通过深入分析现有的人脸检测算法,选择了基于Adaboost算法的人脸检测方法并做了详细介绍,描述了基于Adaboost算法的人脸检测过程,并通过对算法的仿真,验证了算法的正确性及可行性。2、结合FPGA硬件架构实现的特点实现人脸检测。由于Adaboost训练分类器得到的结果只要用到一次,而这个训练用FPGA实现又极其复杂,所以为节省FPGA资源以降低成本,在PC上完成算法的训练部分。然后将训练所得的参数通过串口传输给FPGA,检测部分则由FPGA处理实现。3、基于MBD FPGA的可缩短开发周期、可降低开发成本的优点,本文选用该方法,开发的模型有：对图像灰度进行均衡化处理的图像预处理模块,由于FPGA内计算小数通常极为复杂且特别消耗逻辑资源,所以对CDF(累积分布函数)函数进行了优化,便于FPGA实现；计算待检测图像的积分图的积分图计算模块；获取矩形特征位置参数并计算特征值的矩形特征模块。4、将模型定点化之后直接生成跟模型对应的Verilog HDL代码,利用联合仿真进行了验证,其优势是省略了testbench的编写,可直接进行逻辑仿真。5、在以Cyclone Ⅱ EP2C70F896C6为核心芯片的Altera公司的DE2-70开发平台上对检测系统进行了整体设计,包括串口通信模块、积分图存储的SDRAM控制模块,对检测结果进行显示的VGA显示模块。其中VGA显示模块采用了电阻串联分压的方式,利用FPGA直接驱动VGA,节省了通常情况下模数转换芯片的使用。更多还原

【Abstract】 Face detection is a process to predicate if there is a human face exist in the input image, and correspondingly shows the information of the face when there is. In this paper,based on the deeply analysis of the algorithm and theory of face detection the face detection method of cascade detector based on algorithm Adaboost is adopted, it is based on the rectangular feature of Haar, and it has the advantages of fast detection and high detection rate. Currently, face detection systems mostly adopt the method of software realization on computer,this method has disadvantages in real-time and can’t meet the requirement of system in practical engineering application.With the development of programmable logic device,we complete the face detection system on FPGA. On the development method, this paper adopts the model based on FPGA technology, which can shorten the time of traditional development, and can shorten the-development time by hardware description language, and can improve the accuracy and reliability. In this paper, the main work includes:1) By deeply analysis of the existing face detection algorithm,we choose the face detection method based on Adaboost algorithm and made a detailed introduction, and describes the process of face detection based on Adaboost algorithm,and through the simulation algorithm, verify the correctness and feasibility of the algorithm.2) Combining with the characteristics of FPGA hardware architecture implementation to achieve face detection. To save the FPGA resources and complete algorithm for training on the PC parts, it is mainly due to the Adaboost classifier training results only need once, and the training for the FPGA implementation is extremely complex. Then training the parameters obtained by serial transmission to the FPGA, and the detection part is handled by the FPGA implementation.3)In this paper, MBD FPGA is discussed,and because it can reduce the development cycle and can lower development costs,we choose this method,the development models are:Image preprocessing module, histogram equalization to a balanced treatment of gray image, and it improved the CDF (cumulative distribution function) function to suitable for FPGA implementation; Integral module, calculation of integral image to be detected; Rectangle feature module, obtain the parameters of position of rectangle features, the main computation of eigenvalues of four rectangle features and a detection module.4) Then create Verilog HDL code with the fixed-point model as one-to-one correspondence, which greatly shortens the time spend on developing the description language.Then execute Co-simulation by SIMULINK and MODELSIM to do the verification, this is to omitting the developing job of testbench but directly execute logic simulation.5) In DE2-70development platform, which use a Cyclone II EP2C70F896C6as the core chip, do the overall design for the detection system, including a serial port communication module, and SDRAM storage module and VGA display module.VGA display module adopted a resistor in series divider way, VGA is directly driven by FPGA which saves the usage of general chip,this saves the use of normally modulus conversion chip.更多还原