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高速数码印花机数据处理与喷印控制系统FPGA设计
FPGA Design of Data Processing and Printing Control System for High-speed Digital Inkjet Printer
【作者】 张立;
【导师】 周凡;
【作者基本信息】 浙江大学 , 电子信息技术及仪器, 2013, 硕士
【摘要】 数码印花技术相对传统丝网印花技术具有精度高、耗能低、污染低、交付周期短等显著优势,是未来印花技术的发展方向。数码印花技术的核心是图像数据处理与喷印控制。2009年及以前的数码印花机大多采用PC来处理图像数据,由于PC无法实时地按位转置和输出大量图像数据,数码印花机的喷印速度及其应用均受到限制。大幅提高数码印花机的喷印速度成为一个亟待解决的问题。本文研究开发了基于MPC8548E处理器和Virtex-5系列高性能FPGA的嵌入式系统。使用MPC8548E完成了与PC间的千兆以太网图像数据传输和解压缩,使用Virtex-5系歹FPGA实现了按位转置和喷印控制,并采用高速串行RapidIO1.x接口作为处理器和FPGA间的数据通道。为FPGA例化出三个独立的DDR2控制器,设计DDR2控制器间的协同工作机制以及各DDR2控制器单独的读写机制,以提高输出带宽。利用DDR2控制器的突发传输分块转置图像数据,提高了DDR2控制器的读写效率。利用FPGA的寄存器和Block RAM资源,设计出高效的按位转置运算逻辑。结合特定喷头时序,设计了输出缓存和按用户设定参数喷印的输出控制逻辑。测试结果显示FPGA的写入带宽为341Mbps,转置带宽为315Mbps。据此计算出的理论最大输出带宽为327Mbps,实际测试得输出带宽可达326.4Mbps。采用本数据处理与喷印控制系统为核心的数码印花机,在装配了4个KJ4B喷头,按600dpi x600dpi分辨率进行8色喷印时,喷印速度高达249m2/h。相比以往采用PC处理系统的数码印花机,在同等条件下,其印速成倍提升。
【Abstract】 Compared to traditional screen printing, digital printing has many significant advantages, such as high image precision, energy-efficient, low pollution and short delivery cycle. Therefore, digital printing may become the main printing technology in future. The key parts in digital printing technology are image data processing and printing control. Before the year2009, most digital inkjet printers applied PC to process image data. Because PC couldn’t transpose and output large quantities of image data bit-by-bit in real-time, the printing speed of digital inkjet printer and its application were both limited. Sharply improving the printing speed of digital inkjet printer becomes a pressing issue.An embedded system based on MPC8548E processor and Virtex-5series FPGA is researched and developed in this thesis. MPC8548E receives image data from PC by Gigabit Ethernet and decompresses these data. FPGA is responsible for bit-by-bit transposition and printing control. Image data is transmitted between processor and FPGA through high-speed serial RapidIO1.x interface. Three independent DDR2controllers are instantiated inside FPGA, collaboratively working mechanism among these controllers and read/write strategy of every controller are designed in order to improve output bandwidth. DDR2controller’s read/write efficiency is increased by dividing image data into small blocks and reading/writing these blocks via burst transmission. Effective transposition logic is designed by using registers and Block RAM resources within FPGA. According to printing timing of the specific printhead, output FIFO and control logic which is directed by user setups are designed.Testing results indicate that input bandwidth of FPGA is341Mbps and transposition bandwidth is315Mbp. Theoretical maximum output bandwidth is calculated to be327Mbps, and actual output bandwidth is tested up to326.4Mbps. When equipped with four KJ4B printheads and printing with eight colors in600dpi x600dpi resolution, the printing speed of digital inkjet printer which uses this data processing and printing control system as its key part reaches249m2/h. Compared with digital inkjet printers which utilize PC, the printing speed is dramatically improved under the same conditions.
【Key words】 high-speed digital printing; data processing; control; FPGA;