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基于Verilog的8051微控制器中断系统的设计

The Design of8051’s Interruption System with Verilog

【作者】 郑伟

【导师】 徐静平;

【作者基本信息】 华中科技大学 , 半导体芯片系统设计与工艺, 2012, 硕士

【摘要】 8051微控制器是国内应用较多的8位单片机,建立8051微控制器可综合的Verilog模型有利于嵌入式系统和各种片上系统的实际应用。在微控制器的设计中,控制信号的设计是最复杂的,而在控制信号中,中断系统的设计又是最为复杂的。8051微控制器内部共有5个中断源:外部中断0、定时器/计数器0、外部中断1、定时器/计数器1、串行口中断。8051微控制器内部的2个中断优先级限制了中断控制系统只能满足2个优先级的中断嵌套,而随着8051微控制器功能的扩展原有的中断控制系统已越来越不能满足实际应用。本课题采用Verilog HDL设计的中断控制系统实现了8051微控制器的中断控制,不仅能够完成不同优先级别中断响应控制,同时可以完成同优先级别的中选响应控制,从而实现不同中断响应的无缝衔接,拓展了8051微控制器实际应用。同时优化了中断控制系统的中断响应流程,减少了中断延迟时间,对8051微控制器的实时应用和控制精度提高具有重要意义。系统同时提供了调整修改8051内部5个中断源优先中断级别的功能,方便实际应用中根据实际情况来处理中断。本文详细讨论了中断控制电路、中断响应、中断嵌套,完成了定时器控制模块、外部中断控制模块、串行口中断控制模块的Verilog编码设计。完成原理分析及系统相关模块设计之后,对中断系统相关模块及系统进行了功能仿真。通过使用Mentor公司的ModelSim仿真工具,确保了仿真的准确性。仿真的结果证实了设计思想的正确性,符合本课题原始构想要求。

【Abstract】 8051microcontroller is applied widely in the domestic. Setting up comprehensiveVerilog model of8051microcontroller can be beneficial to the embedded system andvarious onchip debug system. In the degign of microcontroller, the design of the controlsignal is the most complex, and in control signal, the interruption system is the mostcomplex.8051microcontroller contains five interrupt sources: external interruption0,timer/counter0, external interruption1, timer/counter1, interruption of serial mouth.internal Two interrupt prioritys of8051microcontroller limit that the interruption controlsystem can only meet two priority nested interruption. As the function of8051microcontroller expands, the original interruption system cannot catch up with the actualapplication.This subject designs the interruption control system of8051microcontroller withVerilog HDL. It not only can meet interruption response control of different priority levels,but also can complete with priority level among the response control at the same time,realizing the seamless cohesion of different interruption responses. It also expands thepractical applicationof8051microcontroller. This subject optimizes the response process ofthe interruption of the control system to reduce the interrupt delay time, which means a lotto the real-time application and higher precision.The system also provides adjustment function of interrupt priority levels, so users candeal with interruption according to actual condition. This paper discussed the interruptcontrol circuit, interrupt response, nested interruption, completed the timer control module,external interruption, control module, a serial port control module with Verilog.Upon the completion of circuit analysis and design of sub-module, the whole circuitwas functional simulated and verified. Simulation is finished on ModelSim of Mentor.These measurements assured correct design of clock chip. The last design result completedaccord with the design specification.

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