【作者】 肖涛；

【导师】 周理兵；

【作者基本信息】 华中科技大学 ， 电机与电器， 2012， 硕士

【摘要】 伺服系统需要实时地对电机转子的位置与速度进行监测，这样才能很好地控制电机的速度、转矩和位置。在普通的伺服系统里，经常采用的位置检测器件为增量式光电编码器和旋转变压器。随着高品质伺服系统的出现，伺服系统对位置检测的精度要求越来越高。正余弦光电编码器的出现为电机的高精度位置检测提供了硬件基础。通过对编码器的原始信号进行细分可以实现电机的高精度位置检测。目前，国内外广泛采用的细分方法有这么四种：四倍频细分辨向法、幅值分割电子细分法、锁相倍频细分法以及载波调制细分法。这些方法各有优缺点，但是在实际应用中难以满足高精度的需求。本文研究了一种新型的幅值分割电子细分法，基于该方法制作了细分板。本文利用Multisim软件对所设计的细分硬件电路进行了仿真，同时用quartus II软件对细分电路的软件部分进行了仿真。仿真结果验证了该方法的可行性。本文基于这种新型的细分法，制作了一个细分电路板。对所设计的细分电路各硬件模块进行了详细的分析，并用示波器对各模块的输出信号进行了测试，实验结果符合设计要求。细分电路的软件部分采用模块化程序设计，使用Verilog HDL语言对FPGA芯片进行程序的编写。软件分为A/D控制模块和查表算模块。A/D控制模块保证FPGA能可靠地与A/D转换芯片进行通信，查表运算模块实现了细分算法。在实验阶段，用示波器测试了细分板硬件系统各个模块，分析了细分电路的精度及误差。找出了引起误差的原因，提出了相应的改善措施。更多还原

【Abstract】 Servo system needs real-time detection of rotor position and speed to control motorspeed、torque and position. In general, servo system often uses incremental optical encoderand resolver as its position detection device. With the emergence of high-quality servosystem, the accuracy of servo system position detection have become increasinglydemanding.Cosine optical encoder provides the hardware foundation for the high-precisiondetection of the motor. By breaking down the original encoder signal can achieve the motorposition detection precision. At present,widely used subdividing technology at home andabroad have been developed, such as, Resistance Chain Subdivision, Four TimesSubdivision, Carrier Wave Modulation Subdivision and Amplitude SegmentationSubdivision, Phase Locking and Multiple-Frequency Subdivision. These methods haveadvantages and disadvantages,but it is difficult to meet the accuracy requirements inpratice. In this paper, we research a new type of Carrier Wave Modulation Subdivision andAmplitude Segmentation Subdivision. Based on this method, a subdivision circuit is made.In this paper, we use Multisim software to simulate the subdivision hardware circuit.At the same time, we use Quartus II software to simulate the subdivision software circuit.Simulation results verify the feasibility of the method.In this paper, based on this new subdivision, we produce a subdivision circuit board.We make a detailed analysis for every hardware module and test the output signal of eachmodule with the oscilloscope. The reaults meet the design requirement. The software adoptsmodularization programming design and uses Verilog HDL to program FPGA. Thesoftware is divided into A/D control module and look-up table calculation module. A/Dcontrol module make that the FPGA can communicate with A/D converter chip reliably.Look-up table calculation module realizes the subdivision algorithm.In the experimental stage, we test the output signal of each module with theoscilloscope and analysis the accuracy and error of the subdivision circuit. The error ofcircuit trial platform is determined and the potential reasons which lead to the error arefound out. Consequently, several solutions are put forward.更多还原