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MEMS圆片级真空封装的关键工艺研究

Research on Key Process of MEMS Wafer-Level Vacuum Packaging

【作者】 王宇哲

【导师】 汪学方;

【作者基本信息】 华中科技大学 , 机械制造及其自动化, 2012, 硕士

【摘要】 基于谐振结构的MEMS(Micro-Electro-Mechanical Systems,微机电系统)在消费电子品和高速无线网络领域展露了焕然一新的操作体验和迅猛的性能优势,具有尺寸小、批量成本低优势的MEMS圆片级真空封装的商业潜力日益显现。基于键合工艺和牺牲层工艺的制程是MEMS圆片级真空封装的实现方式,这两种制程和纵向互连TSV(Through Silicon Via,硅通孔)结构、用于实时测试腔体内真空度的皮拉尼计、提高封装的寿命的吸气剂与缓冲腔结构都可以用微加工工艺实现。本文研究了上述微结构的实现制程并开展了相关的工艺实验,获得了如下研究结果:提出了一种基于键合工艺的真空封装结构和制程,结构包括TSV(Through SiliconVia,硅通孔)、吸气剂、缓冲腔和皮拉尼计,验证了制程可行。获得了DRIE(Deep Reactive Ion Etch,深反应离子刻蚀)刻蚀TSV通孔工艺和双面电镀、自下而上两种无孔隙的电镀填充工艺。双面电镀工艺后表面沉积的铜层存在较大应力破坏硅片。喷氦测试验证了自下而上的电镀填充工艺获得的TSV具有气密性。实验证明了热氧化沉积的SiO2、PECVD (Plasma Enhanced Chemical VaporDeposition,等离子增强化学气相沉积)沉积的Si3N4、LPCVD(Low-Pressure ChemicalVapor Deposition,低压化学气相沉积)沉积的Si3N4三种薄膜只有LPCVD沉积的Si3N4薄膜能够在湿法腐蚀工艺后完整保留并满足作为支撑结构的要求;利用湿法腐蚀获得了薄膜释放工艺。溅射沉积的Ti、Pt金属薄膜在长时间湿法腐蚀中脱落,需要重新考虑材料选择或添加保护薄膜。实验证明了光刻-溅射-剥离的工艺组合可以在盖帽底部沉积Zr-V-Fe吸气剂,并具有较好的吸气性能。湿法腐蚀工艺可以制作普通或带有缓冲腔结构的盖帽,键合环宽度大于400μm,其腐蚀深度小于100μm时不会产生因凸角腐蚀现象引起的键合环失效。在自下而上电镀工艺中由于设备和条件的限制,保护用光刻胶部分脱落导致键合表面残留的颗粒;电镀不均匀产生的凸出铜柱导致金硅共晶键合工艺的失败,硅片破裂。

【Abstract】 The commercial potentials of micro-electro-mechanical systems (MEMS) wafer-levelvacuum packaging with advantages of small-size and low cost has become obvious, asMEMS based on harmonic structures show brilliant operating experience and perfectperformance in consumer electronics products and high-speed wireless network field.Wafer-level vacuum packaging could be fabricated by the process flows based on waferbonding or sacrificial layer. Pirani meter is used to measure actual pressure in vacuum cavity.Getter and buffer cavity structure are applied to extend packaging life. This paper conducted astudy and related process experiments to implement these micro structures, and obtained thefollowing results.It proposed a kind of vacuum package architecture and its process flow based on thewafer bonding process. The architecture includes through silicon via (TSV), getter, buffercavity and Pirani meter. This process flow was verified by experiments.It obtained the recipes of etching process of TSV by deep reactive ion etch (DRIE) andfilling process without defects by electroplating of double-sided and bottom-up platingmethods. In double-sided method the copper layer generated strong stress and damaged thewafer. Helium mass spectrometer proved that the TSV implemented through bottom-upmethod was hermetic.It was proved that the membrane of Si3N4deposited by low-pressure chemical vapordeposition (LPCVD) kept completely after wet etch in KOH solution and satisfied mechanicalrequirement as supporting membrane. But the membrane of Si3N4deposited by plasmaenhanced chemical vapor deposition (PECVD) and the membrane of SiO2deposited bythermal oxidation deposition cannot meet the requirement. The membranes of Ti and Pt,which deposited by sputter, stripped off in a long-time wet etching by KOH solution. It shouldchange materials or add protective membrane to remain the metal membranes.It proved that the Zr-V-Fe getter could be deposited in cap bottom by lithography-sputter–stripping process flow, and the getter performed well after the process. Wet etchingprocess can fabricate the cap wafer, ordinary or with buffer cavity structure. When the widthof bonding ring is greater than400μm and the depth of etch is less than100μm, the convex corners etch cannot lead to failure.Due to the limit of equipment and conditions in the bottom-up method of TSV filling,the copper particles resulted from the protective photoresist with defect. The protuberantpillars resulted from uniform electroplating. These two faults failed the gold silicon eutecticbonding process and broke silicon wafer.

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