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通信网络的可靠数据传输控制策略研究与实现

【作者】 朱磊

【导师】 廖建明; 赖兰剑;

【作者基本信息】 电子科技大学 , 软件工程, 2009, 硕士

【摘要】 随着互联网技术日新月异的发展,对通信网络的要求越来越高。然而,由于现在通信网络的规模、任务、容量不断增大,互连在一起的机器与子网类型也千差万别,有些特殊的通信网络系统工作环境还很不稳定,这使得物理链路和计算机系统出错的概率变得越来越大。对通信网络的可靠性的研究,成为目前互联网技术研究的热点之一。本文主要对通信网络系统中的链路层报文传输和纠错协议进行了深入研究和设计,为保证链路层上数据的高速无错传输,具体研究了差错控制和流量控制的可靠性实现策略,提出了并行CRC校验、基于滑动窗口协议的重传的可靠性实现方案,并完成了电路的设计,模拟和FPGA实现,验证了设计的正确性。本文首先研究了数据传输中几种常用的检错纠错技术,包括奇偶校验、海明码校验、CRC校验、RS校验等;通过不同校验码的性能比较,并针对并行计算机通信网络的数据传输特点,提出了采用并行CRC校验和重传来进行差错控制的实现方案。许多系统中采用串行CRC算法,对电路频率要求较高,本文设计了一种并行CRC算法,以适用于通信网络并行数据传输特点。本文实现了64位并行CRC电路,并通过模拟、综合和实现,验证了电路实现的正确性性。针对重传和流量控制,本文首先研究了多种流控策略(如XON/XOFF方案、滑动窗口协议等);并进行不同流控策略之间的性能比较,结合通信网络的流水式的信用流控特点,采用了GO-Back-N的滑动窗口重传协议,以减小传输延迟。在并行CRC实现的基础上,本文实现基于滑动窗口协议的重传电路,并完成了模拟、综合和FPGA实现,验证了逻辑设计的正确性。

【Abstract】 The rapid developments of internet technology with each passing day have led to exponential growth of the requirement to high-speed communication network. But the scale,task and capacity of communication network have grown increasingly,the kinds of machines together also differ in thousand ways,and some special communication systems have worked in stable environment,which makes the probability of making a mistake to physical link layer or computer system more and more bigger. So the research to the reliability of high-speed communication network has become a hotspot of the research on internet technology.The thesis thoroughly study and design the message transfer and error correction protocol of link layer of interconnection network. To ensure the high-speed and no error transfer of data in link layer, we start with the reliability of error control and flow control, bring forward the blue print of the 64 bit parallel cyclic redundancy checkout and the retransfer queue based on sliding window protocol, and then finish the design,simulation and implementation of FPGA.We first discuss the principle of error control and many kinds of error detection or error correction technology such as odd-even checkout, haming checkout, CRC code, RS code and so on. Secondly, we compare the performance of different checkout code and point out why the system adopts the CRC code and retransfer for the error control.Many systems adopt the serial CRC, which has high requirement of frenquency .The paper study the principle of parallel CRC, and then study the implementation of the 64 bit parallel CRC circuit by an example, and validate the feasibility of fact circuit by simulation, synthesis and implementation.For the retransfer and flow control, we first study its principle and some important types such as strategy of XON/XOFF, sliding window protocol and so on ,and then sort out the blue print of sliding window protocol which accords with the requirement of the interconnection network system for the decrease of transfer delay. We lastly discuss the key technology and FPGA design scheme of retransfer queue based on sliding window protocol, and validate the feasibility and correctness of logic design by simulation and synthesis.

  • 【分类号】TN915.02
  • 【被引频次】4
  • 【下载频次】206
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