【作者】 王雪；

【导师】 李恩玲；

【作者基本信息】 西安理工大学 ， 物理电子学， 2009， 硕士

【摘要】 近年来随着无线通信技术的飞速发展,使市场对射频集成电路产生了巨大的需求。CMOS射频集成电路以其成熟的工艺、低成本、低功耗的优点,成为射频集成电路的发展趋势。在射频电路中压控振荡器(VCO)占有非常重要的地位,是收发系统中的重要模块。当今各种通信系统对其射频前端中的频率合成器的相位噪声要求越来越高。相位噪声对射频信号的混频十分不利,大的相位噪声会降低信道中的信噪比,因而对于VCO相位噪声的研究极为重要,设计高性能的压控振荡器对通信系统性能的提高具有十分重要的意义。片上电感和可变电容品质的提高使得本机振荡器的单片集成成为了可能。本文论述了电感电容压控振荡器的理论和设计实现方法。首先,介绍了压控振荡器的一般原理和设计的难点,分析了其数学模型,提出了窄频带互补型交叉耦合电感电容压控振荡器的实现方案。其次,论文对片上螺旋电感的结构以及片上可变电容的实现方式做了分析,在电路设计中采用了具有高品质因数的片上螺旋电感和大电容系数比的累积型NMOS可变电容。再次,对压控振荡器的重要性能参数相位噪声进行了深入细致的研究,结合相位噪声理论,引入大电容滤波,二次谐波谐振滤波,感性压控端降噪技术和源极电感负反馈的尾电流源,并且对振荡器的电路结构进行了必要的改进,以达到降低相位噪声的目的。最后,经过对压控振荡器的各种性能参数的优化,设计了完整的LC VCO电路,运用有效的降噪技术获得了低噪声。并用TSMC 0.18μm CMOS工艺,在Cadence的SpectreS仿真器中对电路进行了模拟,仿真结果符合WCDMA指标要求。更多还原

【Abstract】 Recently, with the rapid development of wireless communication technology, the market for radio frequency integrated circuits (RFIC) produces a huge demand. Because of the mature technology, low cost, low power, CMOS RFIC is recognized as the development trend of RFIC. Voltage controlled oscillator (VCO) is a very important component in RFIC and the wireless transceiver. Today, in a variety of communications systems, requirements of phase noise of RF front-end frequency synthesizer are getting higher and higher. Phase noise is bad for mixing of RF signals. Signal-to-noise ratio of signal channel is reduced by large phase noise. Thus, the research of VCO phase noise is extremely important, the designing of high-performance VCO have great significance to improve the performance of communication system.Local oscillator which can be integrated into a single chip become possible by improving the Q factor of on-chip inductor and variable capacitor. In this paper, the theory and design methods of LC VCO are discussed. Firstly, based on analyzing the theory, mathematic model of LC VCO, complementary cross-coupled LC VCO is proposed. Secondly, the structure of on-chip spiral inductors and the implementation of on-chip varactors are analyzed. On-chip spiral inductors with higher Q factor and accumulation NMOS varactors with larger capacitor coefficient ratio are employed to implement the circuit. Tertiary, phase noise that is a very vital parameter for VCO is studied. According to the phase noise theory, large capacitor filter technique, second harmonic resonance filter, inductive control and tail-current source of source cathode inductor negative feedback are used to reduce the phase noise. Moreover, the structure of the circuit is improved by some techniques attempted. In the end, the complete circuit is designed after optimizing each of the parameters of LC VCO. Low noise is achieved by using effective noise reduction technology. Then the circuit is simulated by SpectreS in TSMC 0.18μm CMOS process, and simulation results can meet specification of WCDMA.更多还原