【作者】 李唯；

【导师】 应建华；

【作者基本信息】 华中科技大学 ， 微电子学与固体电子学， 2007， 硕士

【摘要】 数模转换器是数字电子系统和模拟电子系统之间的常用接口电路,得到了广泛的应用。因此设计速度快,功耗低,精度高的数模转换器有很重要的现实意义。本文设计了一种电压分段式D/A转换芯片,该芯片具有很好的单调性。芯片采用串行输入,符合中速的要求;采用电压型输出,能满足大多数应用电路的需求。该芯片工作在2.7V-3.6V电源电压下,具有8位精度。芯片内部有四路通道,可以根据控制信号,灵活的选择一路或多路进行输出。芯片正常工作时,工作电流为0.7mA;还可以通过外部信号的控制进入到关断模式,以降低功耗,这时电流仅为1μA。芯片中的运算放大器输入和输出端都采用的rail-to- rail结构,满足D/A转换器的要求。芯片内部带有带隙基准电路。该带隙基准电路采用了指数型曲线补偿技术,有比较低的温度系数;同时利用深度负反馈的方法,有效的抑制了电源电压变化给带隙基准源所带来的影响,从而提高了电源抑制比。该带隙基准电路温度系数可以达到12ppm/℃;电源抑制比可达到159μV/V。用XFAB工艺对各部分电路进行了仿真,仿真结果表明,该D/A转换器的积分非线性和微分非线性都不超过1LSB,建立时间为小于6μs。本文对各模块的设计做了介绍,由于输出运算放大器电路和带隙基准电路的性能对D/A转换器的性能影响很大,因此本文主要详细的介绍了运算放大器电路和带隙基准电路的设计。同时也对版图设计注意事项做了简单介绍,还给出了芯片的系统仿真波形。更多还原

【Abstract】 The digital to analog converters (D/A converter) is used widely as the conjunctive circuit of digital electronic system and analog electronic system. So it’s worth to design an D/A converter with the features of high speed, lower power consuming and high accuracy. A voltage-segmented D/A converter is designed which has voltage features of monotony.The input mode is serial-input, which meets the requirement of medium-speed; and the output mode is voltage-output, which could satisfy the demand of mass application. The chip is 8-bit which operates from a single +2.7V to +3.6V supply. There are quad-channels in chip. We can select channels to output by control-signal. Chip can be turn to shutdown mode by extern signal to decrease the power consuming. The supply current is 0.7mA while operating and 1μA in shutdown mode.The operational amplifier is designed, whose input and output swing rail to rail, which could satisfy the demand of D/A converter. For the design of the bandgap reference, the architecture of exponential curvature-compensated and the feedback circuit are employed, which satisfy the requirement of the low temperature coefficient (TC) and high power-supply rejection ratio (PSRR). The TC is 12ppm/℃, and the PSRR is 159μV/V.We run simulation with 0 .6μm BiCOMS process, and results of system simulation indicate that the INL and DNL of the DAC chip are both less than 1LSB, the settling time is less than 6μs.Design of each block is described. Performances of output operational amplifier and the bandgap reference circuit have a very deep influence on the D/A converter, so the research of the two parts’design is focused on. Layout consideration is also presented in brief and the simulation waves are given.更多还原