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基于TMS320 DM642的H.264解码器优化

Optimization of H.264 Decoder Based on TMS320 DM642

【作者】 张树军

【导师】 李华;

【作者基本信息】 天津大学 , 信号与信息处理, 2007, 硕士

【摘要】 H.264/AVC是ITU-T视频编码专家组(VCEG)和ISO/IEC运动图像专家组(MPEG)最新制定的视频编码标准。其目的是提供一个具有更高压缩性能和网络友好的算法。即适用于“会话服务”(视频电话)也适用于“非会话服务”(存储,广播,流媒体)应用。TMS320 DM642是美国德州仪器公司开发的第二代高性能超长指令字结构的定点DSP处理器,具有8个独立的功能单元和64个32位通用寄存器,在8个功能单元里扩展了专门用于视频/图像处理的指令集,提高了视频处理的性能和指令结构的并行性;DM642的强大处理和接口能力使它非常适合基于IP和无线网络的音视频传输、安全监控等视频/图像处理领域的应用。本论文主要介绍的是在基于TI TMS320DM642数字媒体处理器的硬件平台上实现H.264“baseline profile”解码器算法。TMS320DM642代表着未来更高处理能力DSP的发展方向,非常适合于承担H.264解码器这样高运算量和复杂度的工作。解码器源程序采用三大开源代码之一的JM,视频解码算法在DSP芯片上的高效实现,必须充分挖掘视频处理器的并行特性和计算资源,才能满足系统实时性的要求。我们在JM程序基础上主要做了以下几项工作:一是对程序进行裁减、修改并最终移植到DSP平台上运行;二是充分利用DM642的EDMA控制器等对数据传输和存储空间进行优化;三是利用内联函数、线性汇编等对H.264核心算法和程序进行改进,提高代码运行的并行性,其中我负责一和二的工作。经优化后的解码器每秒钟能够完成30~40帧QCIF格式图像的实时解码。

【Abstract】 H.264/AVC is the newest video coding standard of the ITU-T Video Coding Experts Group (VCEG) and the ISO/IEC Moving Picture Experts Group (MPEG). The main goals of the H.264/AVC standardization effort have been enhanced compression performance and provision of a "network-friendly" video representation addressing "conversational" (video telephony) and "non-conversational" (storage, broadcast, or streaming) applications.The TMS320 DM642 device is a fixed-point digital signal processor (DSPs)has eight highly independent functional units and 64 32-bit general-purpose registers.At a clock rate of 600MHZ, the DM642 device can perform up to 4800 million instructions per second (MIPS).The powerful capability of data processing and interface make DM642 very fit for the video and imaging applications, for example, the audio/video transmission and security monitor over IP (Internet Protocol) and wireless networks.The main task of this paper is to introduce how to develop and optimize the H.264“baseline”decoder on the hardware platform based on TMS320DM642. The source program adopted is the decoder part of the“JM”which is one of the open H.264 codec software. The effective method to improve the implementation efficiency of the video coding algorithm on DSPs is to“tap”the parallelism and memory resource of the processor for the requirement of real-time system. Three aspects of job have been done on the JM source program: the first is to reduce, modify the source program and port it from personal computer (PC) to the DSP platform; the second is to optimize the data transmission and memory space using the Enhanced Direct Memory Access (EDMA) controller of DM642; the third is to improve the kernel algorithm and code of the encoder using intrinsics and linear assembly language, which can improve the parallelism inherent in the H.264 encoder. In the end, an embedded real-time H.264 decoder with lower-complexity and higher coding performance was provided.Our H.264 decoder can decode 30~40 frames per second (fps) for QCIF resolution video. The decoded video pictures provide high subjective and objective quality.

【关键词】 视频编解码TMS320DM642JMH.264/AVC
【Key words】 CODECTMS320DM642JMH.264/AVC
  • 【网络出版投稿人】 天津大学
  • 【网络出版年期】2009年 04期
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