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Turbo码译码器设计及其FPGA实现

Design and FPGA Implementation of Turbo Decoder

【作者】 薛礼妮

【导师】 唐良瑞;

【作者基本信息】 华北电力大学(北京) , 通信与信息系统, 2008, 硕士

【摘要】 Turbo编码是依据一种新的编码算法,以实现接近Shannon理论极限的译码性能为目标的编码方法。本文的主要工作是研究3G移动通信中Turbo码译码器的设计,并用FPGA来实现。首先,本文对Turbo码的Log-MAP译码算法进行了研究,引入滑动窗技术对前向路径和后向路径计算方法进行了优化,以减小译码延迟和节约存储空间。其次,在对Turbo码的滑动窗Log-MAP译码算法进行研究的基础上,本文对译码器的整体结构进行了分析,并设计了适合硬件实现的流水线结构。最后,应用FPGA技术,并结合3G标准规定的数据速率,对译码器的流水线结构进行硬件电路实现(包括接收数据解复接电路、分支度量计算、前向路径计算、后向路径计算电路等模块的实现等),并对仿真结果进行分析。此外,对交织器的结构进行了分析,并实现了随机交织器的硬件电路。

【Abstract】 Turbo coding is a new coding method, which objective is to achieve the Shannon limit according to a new coding algorithm. The objective of the paper is to study how to design a Turbo decoder used in the third generation code-division multiple access system, which will be realized by FPGA.Firstly, researching the Log-MAP decoding algorithm of Turbo code, primarily optimizing the computing method of forward route and back route through introducing the sliding window technique, so as to reduce the decoding delay and save the storage space.Secondly, based on the research on the sliding window Log-MAP decoding algorithm of Turbo code, analyzing the integrated structure of decoder and designing a pile line structure that can be realized with hardware.At last, realizing a pile line structure of Turbo decoder with hardware circuit, including decompose multiple connection receiving data circuit, calculating the branch metric, calculating the forward path and the backward path, by the application of the FPGA technique as well as the 3G criterion specified data rate. Then, we also analyze the simulation result further.Furthermore, analyzing the structure of interweave component realized with hardware circuit.

【关键词】 Turbo码Log-MAP算法滑动窗FPGA
【Key words】 Turbo codeLog-MAP decoding algorithmsliding windowFPGA
  • 【分类号】TN911.2;TN791
  • 【被引频次】4
  • 【下载频次】457
  • 攻读期成果
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