【作者】 范雷；

【导师】 王琳；

【作者基本信息】 厦门大学 ， 电路与系统， 2007， 硕士

【摘要】 低密度奇偶校验码(Low Density Parity Check Codes,简称LDPC码)作为高效纠错码的一种,因为其良好的性能和能克服Turbo码等其他纠错编码的缺点这一特性,得到了广泛的关注,现在已经成为编码领域界继Turbo码之后的又一研究热点。目前对LDPC码的研究主要集中在二进制LDPC码方向,多进制LDPC码由于其复杂性,目前对其的研究还比较少,尚没有关于多进制LDPC码硬件实现研究的公开发表的成果出现。在前期工作的支持下,在SPW平台上通过比较多进制LDPC码、多进制LDPC码与卷积码的级联码以及目前卫星通信采用的RS码与卷积码的级联码三者深空通信链路中的性能,得到了在相同的帧长和码率情况下采用四进制LDPC码能获得较之目前采用的RS码和卷积码的级联码多达5.1dB的编码增益,在此基础上,本文进行多进制LDPC码硬件实现方面的探索和研究。本文基于对编译码算法的深刻理解,从适宜于硬件实现角度对译码算法进行改进,提出了一种可用于硬件实现的多进制LDPC码译码算法,并通过对现有译码器结构的优缺点进行分析,提出了一种新颖的适用于多进制LDPC码译码器的结构。在此基础上于国际上率先在Xilinx FPGA上实现了适用于卫星通信系统的帧长为2040symbol,码率为0.437255的非规则4进制LDPC码编译码器,且编译码器的资源占用得到了很好的控制,综合性能指标基本达到或超过国际平均水平,编译码速率也基本达到了卫星通信的要求,这将多进制LDPC码应用到实际通信系统中又向前推进了一步。更多还原

【Abstract】 Low Density Parity Check Codes(LDPC codes) is one of high efficient err-correcting codes, it gets wide attention for its excellent performance. Most research of LDPC codes focus on binary LDPC codes at the present time, little research has been done in the field of non-binary LDPC codes for its complexity, we do not find any published paper or production about the implementation of non-binary LDPC codes either.Our team compared the performance of a non-binary LDPC code, a serial concatenation of a non-binary LDPC code with a convolutional code, and a serial concatenation of a RS code with a convolutional code in deep space communication system. The early research results show that with the same code length and code rat, 4-ary LDPC code can gain about 5.1 dB SNR performance improved. With this conclusion, we begin the research and study of implementation of non-binary LDPC codes.Based on deep understanding of encode and decode algorithm of LDPC codes, we first make some improvement of non-binary LDPC codes decode algorithm to make it possible to implement on hardware, second, through analyze and compare the advantage and disadvantage of structure used in binary LDPC codes decoder, then we create a new structure which is suitable for non-binary LDPC codes. Finally we successfully implement a 4-ary LDPC encoder and decoder with code length 2040 symbol, code rate 0.437255 irregular 4-ary LDPC code on Xilinx FPGA for the first time in the world which can be used in satellite communication. Compared with other encoder and decoder of binary LDPC codes, we control the resource very well and the speed of encoder and decoder basically meet the need of satellite communication, this work will do great contribution to the application of non-binary LDPC codes in real communication system.更多还原