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用硬件实现小波变换及其重构的研究

Study of Implementing Wavelet Transform and Reconstruction with Hardware

【作者】 李敏

【导师】 卢文科;

【作者基本信息】 东华大学 , 检测技术与自动化装置, 2008, 硕士

【摘要】 小波变换是数学发展史上的重要成果。它对数学及工程应用都有深远影响。最新的静态图像压缩标准JPEG2000就是以离散小波变换(DWT)为核心变换算法的。本文开始先详细分析了小波变换的理论基础,介绍了多分辨分析(MRA)、Mallat算法和提升算法(Lifting Scheme)。Mallat算法的计算量大,功耗与所占用的硬件面积也大。而提升小波变换算法克服了Mallat算法的缺点。按照提升算法得到的小波系数与传统滤波器处理得到的结果是完全相同的,但是它所使用的硬件资源远远小于传统滤波器架构,并且具有较高的硬件使用率、较少的存储单元和更规则的架构。因此,在分析了超大规模集成电路(VLSI)设计要考虑的性能指标之后,本文提出了一种提升算法的并行二维离散小波变换硬件结构的设计思路和方法,并用了"移位加"、"流水线"、"双口RAM"等技术对小波变换模块进行了优化设计。利用此方案设计的硬件结构具有输入/输出数据流规则;独立性、灵活性强;硬件开销小;结构简单;具有并行性,处理速度快;硬件利用率高的特点。本文利用上述的方案设计得到了Le Gall 5/3小波滤波器的硬件结构,并用硬件描述语言Verilog HDL在RTL级(寄存器传输级)实现了二维离散小波变换,成功地对它进行了仿真。仿真结果与Matlab得到的结果完全一样,验证了所设计的硬件结构的正确性和可实现性。

【Abstract】 Wavelet transform is a very important production in the phylogeny of mathematics. It has strongly impacted on both mathematics and engineering applications. The discrete wavelet transform (DWT) has been used as the core transforming technology in JPEG2000, a newest static image compression standard.Firstly, this thesis analyzes the theory fundamental of wavelet transform in details, and also introduces mufti-resolution analysis (MRA), Mallat algorithm and Lifting Scheme. Comparing with the traditional DWT, the Lifting-based DWT is lower implementation complexity and less hardware resources. After analyzing the specifications of Very Large Scale Integration circuit (VLSI) design, we obtain the design idea and methods of 2D DWT chip based on Lifting Scheme. Especially in the transform module, we use the shift-add technique, the pipeline technique, and the two-way RAM technique to optimize the architecture. The optimized architecture results in the merits: regular input/output data stream, strong independence and flexibility, low hardware cost, simple architecture, intrinsic parallelism, high percentage of hardware utilizing.Using the above methods, the hardware architecture of Le Gall 5/3 wavelet filter is obtained in this thesis. Then we implement 2D DWT in the register transfer level (RTL) using the hardware description language Verilog HDL. We also successfully simulate the architecture in RTL. The result of simulation is the same as that of Matlab simulation, which proves that the designed architecture is correct and practicable.

【关键词】 小波变换重构硬件提升算法VLSI
【Key words】 wavelet transformreconstructionhardwareLifting SchemeVLSI
  • 【网络出版投稿人】 东华大学
  • 【网络出版年期】2008年 08期
  • 【分类号】TN919.81
  • 【被引频次】4
  • 【下载频次】398
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