【作者】 邵丹；

【导师】 戴明远；

【作者基本信息】 同济大学 ， 信号与信息处理， 2007， 硕士

【摘要】 近几年来，我国高速公路发展迅速，已经形成了纵横交错的高速公路网，极大地促进了经济的发展。然而，如何对高速公路进行科学有效的管理，使其发挥最大的效益是我们面临的一个重要课题。在高速公路的管理和规划中，汽车速度和交通流量等交通流数据是最基本、最普遍、最丰富的数据源。本文的研究目的，就是实现一个高速公路监控系统，实时的测量过往汽车的速度，并统计交通流量，同时把统计结果存储起来，从而为相关交通部门提供必要的交通信息。本文设计的高速公路监控系统，以线阵CCD图像传感器作为前端检测装置，以ARM微处理器作为中心信号处理装置。为了便于本系统软件部分的开发并保证系统的实时性，本系统还使用了嵌入式实时操作系统uC／OS-Ⅱ。最后，本系统将计算的汽车速度和统计的交通流量存储到U盘上，大大方便了本系统和PC机的通信，便于相关人员对统计结果进行分析和存储。较之传统的高速公路汽车检测设备，线阵CCD图像传感器价格适中，受天气和周围环境影响较小，同时具有很高的响应速度。因此，基于线阵CCD的测速系统通常具有更高的可靠性和测速精度。同时，ARM微处理器和嵌入式实时操作系统的使用，使本系统有一定的可靠性和先进性。另外，该监控系统采用了CPLD技术，将大部分数字电路环节集成在一个CPLD芯片中，为系统的小型化、稳定性、抗干扰性和在线修改升级创造了条件。实验证实，本系统提出的方案是可行的。更多还原

【Abstract】 The speedway in our country has been growing rapidly in recent years, and hasformed a complicated network, which has greatly promoted the development ofeconomy. Carrying out scientific and effective administration to the speedway isbecoming a more and more important problem. Traffic data such as vehicle speed andtraffic flow is the most important data source in the administration of speedway.A new design of traffic monitoring system, which calculates the vehicle speedand takes count of the traffic flow, is put forward in this paper. The monitoring systemis equipped with linear CCD image sensor and ARM micro controller. CCD detectsthe speedway and outputs effective signal, which is processed later in ARM. In orderto guarantee the system’s real-time performance, the embedded real-time operatingsystem uC/OS-Ⅱhas been used, which has also supplied a great convenience in theprocess of softeware development. As important traffic information, the monitoringresult is stored in a U disk and supplied to the relating traffic department, so it canalso be analysed and stored on PC.Compared with the traditional vehicle-detected equipment, linear CCD is not tooexpensive, and has a high speed of response. Besides, it is less affected by theenvironment around. Therefore, speed measurement system based on linear CCDgenerally has a higher reliability and precision. The use of ARM and RTOS alsocontributes to the system’s reliability and advancement. The CPLD technology is alsoadopted in this system. Most digital circuits are integrated in one CPLD chip, whichcreats conditions for the system’s miniaturization、stability、anti-jamming andin-system modification. The experiment demonstrates the feasibility of the design putforward in this paper.更多还原