【作者】 侯卫卫；

【导师】 冯全源；

【作者基本信息】 西南交通大学 ， 计算机应用， 2007， 硕士

【摘要】 随着器件尺寸缩小和电源电压的下降，电路设计的重点已经从基本的参数要求转向低电压、低功耗方面，同时要求电路具有更好的精确度和更低的噪声。在低电源电压的条件下，基于共源共栅技术的单级放大器已经不能满足高增益要求。很多电路设计者了解到低电压多级放大器的重要性。但是，由于所有的多级放大器本身会产生多个极点，会造成电路的不稳定。因此出现了很多频率补偿结构。本文基于放大器频率特性，首先从理论上详细分析了两级放大器频率补偿的两种结构，综合考虑采用补偿技术的放大器技术指标，针对这两种补偿结构的理论分别设计了电路，详细介绍了每个电路各个部分的构成以及如何设计，计算出各个电路增益、极点的表达式、共模输入范围。采用UMC 0.6um双铝双层多晶BICMOS工艺MODEL对电路的各个性能指标进行仿真分析，仿真的性能指标包括放大器的开环增益、相位裕度、共模输入范围、差模输入范围、电源电压抑制比、共模抑制比。最后比较分析这两种电路。本章中设计的两个两级放大器实现了好的性能指标，增益带宽大，频率特性好，在实际中能够很好的应用。接着对三级放大器频率补偿理论进行深入的研究和分析。设计了两个三级放大器电路。从整体上详细分析了电路的组成，分别计算了电路的增益和极点，同样采用UMC 0.6um双铝双层多晶BICMOS工艺MODEL对电路的各个性能指标进行仿真分析，仿真的性能指标包括放大器的开环增益、相位裕度、共模输入范围、差模输入范围、电源电压抑制比、共模抑制比。本章最后比较分析这两个三级放大器电路。最后对文中设计的电路进行总结。更多还原

【Abstract】 With the scaling down of device sizes and supply voltages, the design emphasis had shifted from the basic qualities towards the ability of circuits to operate at a low supply voltage, consuming a minimum amount of power, demanding on accuracy and noise at the same time. Single-stage amplifiers based on the cascading technique were no longer suitable for achieving high dc gains under low supply voltages. More circuit designers were aware of the importance of low-voltage multistage amplifiers. However, all multistage amplifiers suffered close-loop stability problems due to their multiple-pole nature. Therefore, many frequency compensation topologies had been proposed.Firstly, two-stage amplifier frequency compensation topology had been analy -zed in terms of theory in the paper detailedly, based on amplifier characteristic. C -onsidering the parameter of amplifier based compensation technology in general, two circuits had been designed for different compensation theory. We analyzed the circuit structure and the design process for each circuit. Expressions of DC gain, p -ole, and common mode input range were calculated. After that, based UMC 0.6 um 2P2M BICMOS MODEL, every parameter had been simulated and analyzed, including open gain, phase margin, common mode input range, differential mode input range, power supply rejection ratio, common mode rejection ratio. A comparison was given for the two circuits above. The two two-stage amplifiers had good performance index, high unity gain bandwidth, good frequency characteristic, and could be applied well in practice.Then, three-stage amplifier frequency compensation topology had been analyzed in terms of theory detailedly. Two circuits of three-stage amplifier had been designed for different compensation theory. We analyzed the circuit structure in general. Expressions of DC gain, pole were calculated. On the basis of UMC 0.6 um 2P2M BICMOS MODEL, every parameter had been simulated and analyzed for each three-stage amplifier proposed in the paper, including open gain, phase margin, common mode input range, differential mode input range, power supply rejection ratio, common mode rejection ratio. A comparison was given for the two three-stage amplifier circuits in the fourth chapter in the end..Finally, conclusions were given for circuits in the paper.更多还原