基于数字移相时钟的新型测频`方法研究与实现

【作者】 夏文鹤；

【导师】 黄建国；

【作者基本信息】 电子科技大学 ， 测试计量技术及仪器， 2007， 硕士

【摘要】 本文研究的基于数字移相时钟的新型等精度频率测量方法能完成脉冲雷达信号单脉冲脉内载频测量,它是针对雷达下变频后中频信号测量电路提出的新型测频方法。这种方法可以用较少的硬件资源完成高精度的测量,因而大大降低了研制成本。文章从分析电子计数器测频量化误差的来源入手,阐述了提高测频精度,减小量化误差的方法,介绍了目前较为成熟且运用广泛的高精度测频测时方法:模拟内插法和数字内插法。通过对两种内插法的详细分析,找出了该测量方法的不足之处,并提出了两种改进思路:多路移相时钟相位锁存法和多路移相时钟计数法,并从可行性的角度,最终确定了用多路移相时钟计数法作为改进方案。该测频系统中所用的高频高精度的时钟信号,是利用锁相环对恒温晶振输出的低频高精度信号锁相倍频,构成一个时钟相位负反馈自动控制系统,从而得到所需频率和精度的时钟信号。本课题在内插技术和PLL倍频移相技术理论研究基础上提出了具体的实现方案,它不需要添加和维护额外的高精度时钟基准,具有精度高、稳定度好、结构简单、成本低廉、易于实现等优点,通过仿真和实际测试,各项指标都能达到系统的要求。更多还原

【Abstract】 The novel uniform precision frequency measure method this paper mentioned is valuable in instantaneous frequency measure field. It is newly-type method which aim at the radar IF measure. It can use less hardware resource to complete the high accuracy frequency measurement, so it reduces the research cost greatly.Firstly, this paper analyses the origin of measure error, and introduces some methods that can improve the measure accuracy or decreases errors. Then this paper introduces a common method which called high accuracy-cursor interpolating method particularly and explains the limitations of this method. Secondly, the paper provides two ways to break the limitations of this method immediately, the technique of clocks lock and the means of clocks count, and selects the means of clock as the final design scheme.The high frequency and high accuracy clock used in this paper is provided by Phase Lock Loop (PLL). The PLL multiplies the clock, which OCXO (Oven voltage Controlled Crystal Oscillator) output, and trail the clock phase, constituting a clock frequency control system; consequently the clock can be regarded as the standard counter clock.This design is based on the technique of time interpolating and the technique of clock multiplying by PLL, it have no use for extra clock benchmark, with the characteristic of high accuracy, high stability and simple structure. The all parameters of this design satisfy the requirements of measure system.更多还原