基于SiGe BiCMOS技术的HBT设计及工艺研究

【作者】 李文杰；

【导师】 杨谟华；

【作者基本信息】 电子科技大学 ， 微电子学与固体电子学， 2007， 硕士

【摘要】 随着无线通信技术的快速增长,普通Si工艺的半导体器件和集成电路已经不能满足发展需求。SiGe BiCMOS技术具有高性能、低成本的特点,发展前景好,因此对SiGe BiCMOS技术进行研究有非常实际的意义。论文通过对SiGe BiCMOS工艺和SiGe HBT原理的研究,确定了适用于24所工艺条件的1.5μm SiGe BiCMOS工艺流程,并基于该工艺流程设计出了电学特性良好的SiGe HBT器件。首先参考国外成熟SiGe BiCMOS工艺,结合24所实际工艺条件,以少量的横向精度为代价,开发出切实可行的1.5μm SiGe BiCMOS工艺流程,并设计出相应的器件结构。流程基于非选择性外延,采用SIC（集电区选择性注入）和外基区自对准注入工艺,能大幅度提高器件性能和工艺可实现性。考虑到与Si CMOS器件结构的兼容,将CMOS栅氧层、多晶硅栅和SiGe HBT外基区有效结合,减少了工艺步骤,提高了集成度。然后,通过理论分析和模拟仿真提出了基于1.5μm SiGe BiCMOS工艺的SiGe HBT优化设计原则和设计步骤。主要包括:（1）集电区掺杂浓度和厚度确定;（2）基区宽度和杂质分布形式优化:（3）Ge组分分布形式设计,以及Ge引入集电区深度确定;（4）发射区多晶硅掺杂浓度与单晶硅薄层厚度的计量优化。依据以上优化原则,设计出电学特性优异的SiGe HBT器件,模拟结果显示,电流放大倍数β=210,Vce=2.5V时截止频率fT=65GHz。最后针对非选择性外延SiGe BiCMOS工艺中的关键工艺-SiGe图形外延进行研究。利用MBE设备,在Si衬底上成功保形外延了应变SiGe薄膜。采用SEM（扫描电子显微镜）和AFM（原子力显微镜）,得到了清晰的材料表面形貌和良好的表面粗糙度数据（RMS小于0.45nm）;利用X射线双晶衍射仪,获得了SiGe/Si良好的X射线双晶衍射摆动曲线;择优腐蚀试验也显示了较小的位错缺陷密度(1×103cm^-3 -2×10³cm^-3)。数据显示材料表面粗糙度和晶格完整度都满足器件制备对材料特性的要求。更多还原

【Abstract】 Conventional silicon devices and integrated circuits cannot reach the demands of wireless communication development, while SiGe BiCMOS technology has a promising future with higher performance and lower cost. Research on this technology is quite necessary. Based on the research of BiCMOS process and SiGe HBT characteristics, a flow suitable for 1.5μm SiGe BiCMOS is developed in this paper. SiGe HBT devices are designed under this process conditions. The test results show good electrical characteristics.Firstly, based on the international mature SiGe BiCMOS technology, taking consideration of the No. 24 research institute of CETC process condition, a practicable 1.5μm SiGe BiCMOS flow is developed. SiGe BiCMOS device structures are also designed. The process is based on non-selective epitaxy, with SIC （collector selective implantation） and ex-base region self-aligned implantation. This design greatly enhances the device performance and makes the process more feasible. The compatibility with Si CMOS device structure has been considered thoroughly in design. The process of CMOS gate, ploy Si gate, and SiGe HBT ex-base have been optimized in order to simplify the flow. As a result, the integrated level has been improved.Then, through theoretical analysis and simulation, SiGe HBT optimization rules and design steps for 1.5μm SiGe BiCMOS are presented, which include: （1） collector doped level and thickness; （2） width of base and impurity profile; （3） Ge mole fraction profile, （4） poly Si doped level in emitter and thickness of Si cap layer. According to these optimization rules, a SiGe HBT for BiCMOS technology has been designed. The simulation results show expected electrical characteristics, the current gainβ=210, cut-off frequency f_T = 65GHz when V_ce = 2.5V.At last, research has been carried out to study the SiGe pattern epitaxy, which is the key process of SiGe BiCMOS technology. In the experiments, a strained SiGe thin film has been patterned successfully by MBE expitaxy. Through SEM （scanning electronic microscope） and AFM （atom force microscope）, the high-resolution photos of material surface are obtained. The root-mean-square surface roughness is less than 0.45nm. The XRD curve shows that the smoothness and strained level have met the demands of material in device fabrication.更多还原