基于FPGA的DQPSK调制解调器研究与设计

【作者】 麦文；

【导师】 鲍景富；

【作者基本信息】 电子科技大学 ， 电路与系统， 2007， 硕士

【摘要】 本课题对DQPSK调制解调技术的FPGA实现进行了比较全面的研究，利用DQPSK调制技术实现了码速200Kbps的调制器。调制载频3.2MHz、带宽180KHz、带外抑制大于45dB，调制器设计达到预定要求。解调器硬件完成，软件未全部实现，但完成了CIC滤波器、载波跟踪环、位定时同步、并串转换等几个关键模块的设计。对解调器做了实验测试，验证了相关模块设计的正确性，解调器中重要的载波同步功能已能实现。在本文中，主要介绍了DQPSK调制解调技术的FPGA实现。着重对差分编解码、成形滤波器、Costas载波跟踪环以及CIC滤波器进行了详细叙述，对硬件设计则做了简要的说明，给出了主要电路图和实物图。在重要设计环节上，文中进行了比较细致的Matlab仿真及System View仿真，并给出了相关分析与说明。最后，采用VHDL硬件描述语言对系统进行了设计与实现。文中对位定时同步以及CIC滤波器的可变速设计做了创新与改进。更多还原

【Abstract】 This project studies the modulation and demodulation of differentially encoded Quadrate Phase Shift Keying technology base on FPGA, by using DQPSK digital modulation method to realize digital signal transmission. The bit rate arrives 200Kbps and the carrier wave frequency is 3.2 MHz, bandwidth 180 KHz, out band suppression excess 45dB. Modulator design requirements achieved. Demodulator has not fully realized. But the project has accomplished the CIC filter, carrier tracking loops, bit synchronization and several important blocks. Some experiments show the relevant design is correct. The carrier synchronization functional of demodulator has been able to achieve.The paper mainly introduces the realization method of the DQPSK modulation and demodulation techniques base on FPGA. Specially discuss the differentially coded and encode, the pulse shaping filter, the Cascade Integrator Comb filter and Costas carrier tracking loop, etc. Then briefly shows the main circuit schematic design and object pictures.On every important design points, the paper does carefully Matlab or System View Simulation and given interpretations. Then using the VHDL hardware description language design and verifies the system. At last, the paper innovate the bit synchronization method and improves CIC filter for variable speed using.更多还原