基于PCI总线的高速数据采集卡的设计

【作者】 孙波；

【导师】 黄建国；

【作者基本信息】 电子科技大学 ， 检测技术与自动化装置， 2007， 硕士

【摘要】 现代电子系统几乎都面临着高速、大容量数据流的运算与处理问题。在许多应用场合,如雷达、通信、声纳、图像、智能仪器等,都需要设计、应用高速数据采集系统,以在极短的时间获取大量的数据,而数据采集卡是数据采集系统的核心,它在数据采集系统中起着举足轻重的作用。本论文在研究数据采集卡的各个模块的工作原理的基础上,分析了国内外在数据采集卡上采用的流行技术,完成了一种基于PCI总线的高速数据采集卡的设计,主要内容包括:1.研究了信号调理通道、触发通道的实现了电路设计,对输入信号可以达到200MSa/s的最高采样率,12位的垂直分辨率;2.研究了高速、大容量存储体的设计。论文采用了DDR SDRAM做为被采集数据的存储体。论文中介绍DDR SDRAM芯片以及相关外围电路的设计,研究了DDR的信号完整性问题,介绍了DDR SDRAM的命令、参数与工作机制,并设计了一种基于FPGA的DDR SDRAM控制器,实现了对DDR SDRAM初始化、刷新、读写等操作,给出了仿真与调试结果,达到了32MB的存储深度,并可以很容易扩展成更大的容量;3.研究了高速数据传输的设计。考虑到性能与兼容性,数据传输接口使用了PCI总线,设计了一种基于FPGA的局部总线控制器,最终实现了PCI9054与PC之间的DMA高速传输。更多还原

【Abstract】 Almost every modern electronic system faces the problem of computing and processing of a mass of high-speed and data. In many fields, such as radar, communication, sonar, image, intelligent instrument and so on, design and application of high-speed data acquisition system is necessary to acquire data in very shot time. Data acquisition board is the heart of a data acquisition system and, playing a very important role in a system.In the thesis, each function module and prevalent technology on a data acquisition board is investigated detailedly, and the hardware design of a high speed data acquisition board is achieved. The following is the main content:1. The principle of singal adjustment channel and trig channel are investigated, and its hardware design is realized. Signal can be sampled at 200MSa/s with 12 bit vertical resolution. And trig function is also available.2. High-speed and huge capacity of memory is investigated. DDR SDRAM is taken as the memory for it high performance. The design of DDR SDRAM and its related circuit is investigated, as well as the singal integrity problem of it. Commands and parameter and principle of DDR is introduced, and a kind of FPGA based DDR controller is realized, with the function of initialization, refreshing and reading/writing. Simulation and debugging results are also supplied. 32MB memory capacity is achieved and can be timed easily.3. High-speed data transferring is investigated. For higher performance and better compatibility, PCI bus is taken as the data transferring interface to PC. A kind of FPGA based Local bus controller is investigated, and high-speed data transferring is achieved.更多还原