【作者】 饶进；

【导师】 胡晨；

【作者基本信息】 东南大学 ， 微电子与固体电子学， 2005， 硕士

【摘要】 模数转换器(简称ADC)是模拟电路和数字电路的接口,其用途非常广泛。由于SoC系统对高性能、低功耗、低成本等性能的要求,ADC及其它模拟电路IP核和MCU融为一体,构成一个SoC已是大势所趋。针对嵌入式的应用,设计一个与数字工艺兼容的ADC IP核是实现ADC在SoC芯片中集成的重点和关键。本文设计了一种面向触摸屏应用的ADC IP核。采用Top-Down的设计方法,分别进行了系统设计、电路模块设计、总体设计与参数模拟仿真和物理版图设计。在分析触摸屏信号采样和其他辅助测量的应用基础上,设计了ADC IP核的系统结构,并确定了系统的各项性能指标。重点优化设计与实现了各个电路模块,不但保证了电路的性能,而且有效地减小了芯片面积。采用自校准比较器结构有效地提高了ADC的精度。在时钟电路中,设计了独特的时钟相位分相的电路结构,通过改变时钟频率,实现了采样频率和转换精度的参数可配置。而对于数字控制部分,我们设计的结构可以无需MCU介入即可控制所有触摸屏偏置电压,并记录全部测量结果。本文采用的数模混合仿真方法,对各项性能指标进行了具体的模拟和分析,并最终实现了一个参数可配置的ADC IP核。文中所使用的模型参数和物理规则均按照SMIC 0.18um MPW工艺进行。本ADC IP核模拟部分的版图面积仅0.43mm~2,转换精度最高可达10Bit。10位转换精度,1Mhz采样速率时,信噪比为58.9B,微分非线性不高于0.9LSB,平均功耗为6mW,各项性能指标均能很好的满足设计要求。更多还原

【Abstract】 Analog to Digital Converter (ADC) is the interface of analog and digital circuit, its use is very extensive. Because of SoC systematic requisition for performance, such as high performance, low consumption, low cost, etc., ADC and other analog circuit IPs are combined with MCU, which has already been the trend of the times to form one SoC. To embedded application, develop an ADC IP core compatible with digital technology is the key to integrate ADC into a SoC.In this thesis, a technique to design an ADC IP core in SoC used for touch panel is introduced. According to Top-Down design method, the design is finished in term of four stages, including system design, circuit block design, performance simulation and layout design. Based on the analysis of touch panel signal sampling and other auxiliary application, a successive-approximation ADC structure is adopted and the performance specifications are defined. Key optimization design and realizing each circuit block, not only has guaranteed the performance of the circuit, and has reduced the area of the chip effectively. A self-calibrate comparator is being used to improve the precision of ADC; using the circuit structure of the unique clock phase place, the clock frequency can be changed by setting parameters, thereby, changing the sampling frequency and converting precision. Digital structure that we design can deal with all measure result without MCU. The IP core has been implemented in SMIC 0.18um MPW technology with full custom technique. Each performance parameter of the ADC is simulated and analyzed with the mixed-signal co-simulation strategy.The overhead of the analog part is only about 0.43mm~2, and the sample precision can be as high as 10Bit. When used in 10 bits precision, the SNR is 58.9B;the average power is 6mW;the DNL is less than 0.9LSB. So the ADC IP core can be perfectly satisfied with the requirement in SoC system.更多还原