【作者】 张宝宜；

【导师】 邱宏安；

【作者基本信息】 西北工业大学 ， 水声工程， 2007， 硕士

【摘要】 随着科学技术的飞速发展，声纳设备逐渐向数字化、智能化发展。信号检测作为声纳信号处理的重要任务之一，其性能的好坏将直接影响到整个系统，因此研制出高性能的信号检测处理系统就很必要。被动声纳是根据目标航行时发出的辐射噪声来检测目标并判别目标类型的，被动声纳的线谱检测就是要将舰船辐射噪声的线谱分量从宽带背景噪声中提取出来，以实现对声纳目标的正确检测。本文从工程实现的角度出发，对被动声纳信号检测的原理及算法进行了初步的研究，接着重点研究了算法的DSP实时实现问题。 本文首先从理论出发，讨论了被动声呐检测的国内外研究现状、实现的意义，以及其基本理论。在此基础上，提出了基于线谱检测的自适应线谱增强器+Chirp-z变换相结合的检测算法，并在Matlab中进行了仿真研究。 然后讨论了信号处理系统的功能任务，并对算法进行计算量估计和实时性分析。在此基础上，主要以高性能的DSP为核心，提出了“DSP+DRAM+CPLD”相结合的信号处理系统硬件技术方案。采用模块化的设计思想，完成了各个模块的原理框图设计。接着重点对各个模块进行了具体的硬件电路设计，在Protel中绘制了电路原理图和PCB图。主要设计的电路包括DSP时钟、电源、复位及看门狗电路、外扩FLASH、JTAG接口、双端口RAM、McBSP多机通信、异步通信、USB2.0接口电路、CPLD逻辑电路、驱动电路等。在Quartus Ⅱ中完成了CPLD的逻辑控制电路设计。 在硬件设计的基础上，提出了在本系统中实现各项功能的软件设计方案，并对硬件及软件算法进行了程序的编写，主要包括检测算法子程序、管理控制程序、FLASH烧写程序、串行通信程序、用户界面编程、USB固件程序、驱动程序等。 最后以系统的控制板为例，对硬件电路及软件算法进行了调试，对调试中出现的问题进行了分析，使得系统的功能得以基本实现。更多还原

【Abstract】 With the fast development of science technology, sonar system is digitized and intelligentized gradually.Signal detection is one of the important tasks of sonar signal processing, it’s very necessary to design digital and high performance signal processing system. Passive sonar system detect and judge the target are based on radiate noise of the target. Line spectrum detection is distinguishing line spectrum of the radiate noise from broad band noise, and detect the sonar target accurately. In this thesis, the sonar theory and signal detection algorithms are preliminary studied and the emphasis is placed on the real-time realization of the DSP system.Firstly, the status quo and basic theory of passive sonar technology are described. Base on it, two signal detection algorithms of adaptive line enhancer and chirp-z transform are produced, and are simulated and studied in Matlab.Secondly, the function and assignment of signal processing system are discussed, and the real-time of algorithms are analysed. According to the simulation results and the index of system performance, the hardware circuit and PCB circuit are designed in Protel, which is based on a "DSP+DRAM+CPLD" pattern using method of modularization. In detail, circuits mainly including DSP timepiece, power supply, reset and watchdog circuit, FLASH circuit, JTAG interface circuit, DRAM circuit, McBSP communication, asynchronous communication, USB2.0 interface circuit, CPLD logic circuit, driving circuit etc. CPLD logic circuit is designed in Quartus II. Then, the software design of the system based on the hardware circuit. Program mainly including algorithms, system work, FLASH bootloader, serial communication, user interface, USB firmware, USB driver and so on.At last, the debugging course of software and hardware is presented for the control board, some problems are found and analysed. In summary, system basic function are realized.更多还原