地面数字电视融合方案接收机的同步系统的设计与实现

【作者】 赵文亮；

【导师】 朱维乐；

【作者基本信息】 电子科技大学 ， 信号与信息处理， 2007， 硕士

【摘要】 本项目完成的是中国地面数字电视融合方案接收机同步系统的FPGA设计与实现。以Stratix系列的EP1S80F1020C5 FPGA为基础构建了主硬件处理平台。系统中数字下变频、高阶匹配滤波器和整个系统同步都是基于FPGA硬件设计实现的。本文首先介绍了数字电视的发展现状,融合方案发端系统的整体结构、融合方案接收机系统概述。第三章重点介绍了基于FPGA的基带变换的设计,包括数字下变频DDC和匹配滤波器两部分。第四章详细介绍了融合方案接收机同步系统的算法分析和结构设计,根据融合方案发端信号帧结构的特点分析和探讨了时域同步算法,包括符号同步、采样同步和频率同步,同时提出了可变PN帧头模式下的相位匹配过程。第五章简单介绍了残余频偏估计和校正的原理和硬件设计,给出了理论仿真。第六章给出了整个接收机前端系统的板级调试结果。我在项目中完成的工作主要有:1.阅读相关文献资料,了解中国地面数字电视融合方案的整体结构和原理。2.建立系统发端模型和信道模型,供接收端仿真。3.完成了数字下变频、匹配滤波器、符号同步、采样同步和频率同步的算法设计和仿真。4.完成了残余频偏估计和校正的算法设计和硬件代码编写5.完成了整个融合方案接收机前端系统的功能仿真、分析和验证。6.完成了整个系统同步的板级调试。更多还原

【Abstract】 The FPGA-based hardware implementation and design of the receiver’s synchronization system of the merged blue print for digital terrestrial television broadcasting in china has been completed in this project. The main hardware-platform is based on the Altera’s Stratix series FPGA chip EP1S80F1020C5. The realizations of the digital down converter (DDC), matching filter and all the system synchronization have been implemented based on FPGA. In this dissertation, the developing status of DTV, which is followed by the whole structure introduction of the transmitter and system summary of the receiver of the merged blue print, is introduced firstly. The design of base band converter, which is composed of digital down converter and matching filter, is introduced importantly in chapter 3. In chapter 4, the arithmetic analysis and architecture design of the synchronization system of the receiver are introduced in detail. The timing domain synchronization including symbol, sampling and frequency synchronization is discussed according to the characteristics of frame structure in merged blue print. At the same time, this dissertation has raised the process of the phase matching in the mode of changed PN. The chapter 5 simply introduces the theory and hardware design of the residual frequency estimation and revision. The academic simulation is also well done in this chapter. The debugging results on the PCB of the front system of the receiver are described in chapter 6. What I have mainly done in the project is listed as follows:1. Read papers associated with the project and get familiar with system.2. Establish the transmitter and channel model for the receiver simulation.3. Complete the arithmetic design and simulation of the DDC, matching filter, symbol, sampling and frequency synchronization.4. Complete the arithmetic design and hardware code of the residual frequency estimation and revision.5. Complete the function simulation, analysis and validation of the whole front system of the receiver in the merged blue print system.6. Complete the debugging on the PCB of the system synchronization.更多还原