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数字化载波同步环路算法的设计与实现

Design and Implementation on Algorithm of Digitized Carrier Synchronization Loop

【作者】 叶准

【导师】 孟维晓;

【作者基本信息】 哈尔滨工业大学 , 信息与通信工程, 2006, 硕士

【摘要】 同步是通信系统中一个非常重要的问题,它是进行信息传输的前提和基础,同步性能的好坏直接影响通信系统的性能。本文对数字化载波同步技术及其算法的软件实现做了深入的探讨与研究。载波同步的任务就是跟踪载波的频率和相位,对于载波相位及小频偏的跟踪,最有效的方式是使用锁相环。因此本文首先研究了锁相环的基本理论,着重探讨了适合用软件实现的锁相环结构。接着阐述了数字化锁相环各个部件的工作原理及实现方法,包括数字控制振荡器,数字鉴相器,数字滤波器等,研究了改进各部件性能的方法。通过模拟锁相环与数字化锁相环的相位传递函数之间的联系,推导了模拟锁相环与数字化锁相环各参数之间的关系,得到了设计数字化锁相环参数的方法。接着分析了用于扩频通信系统载波跟踪的数字化科斯塔斯环的结构。在数字化载波同步环路中,对于具有较大频率偏移的载波的跟踪,可以使用叉积自动频率跟踪算法以及频率开槽技术等,本文研究了它们的工作原理。在此基础上提出了数字化、软件化的载波同步环路算法方案,主要采用数字化科斯塔斯环的形式,并加以自动频率跟踪算法和频率开槽技术的辅助来实现载波同步。对环路中的各部件参数等进行了设计与仿真,建立了环路的动态仿真模型,验证了算法的正确性,并且得到了数字化载波同步环路设计的一些经验值。应用数字信号处理器实现了所设计的算法,进一步验证了方案的正确性与可行性。最后给出了一种用FPGA与DSP组成的硬件平台实现软件无线电接收机载波同步环路的方案。

【Abstract】 Synchronization plays an important role in communication systems. It is the precondition for the processing of information transportations. The performance of synchronization will directly influence the performance of communication systems. This thesis makes a deep research of digitized carrier synchronization technology and the algorithm’s software implementation.The task of carrier synchronization is tracking the frequency and phase of a carrier wave, the most effective means for tracking small frequency deviation and the phase of a carrier is using the phase-locked loop (PLL). Therefore, first the paper investigates the fundamental theory of the phase-locked loop, in which we place stress on the phase-locked loop structure which is suitable for software implementation. Then the paper researches the operational principle and realization method of each subassembly of the digitized phase-locked loop, which includes numerical controlled oscillator, digital phase dectector, and digital filter etc., and also discusses the method of improving the performance of each subassembly. By comparing linear and digitized PLL’s phase-transfer function, we obtained the relations between the two type PLL’s parameters, thus gives out a scheme of digitized PLL’s design. Then the paper introduces the operating principle of the digitized Costas loop used in spread spectrum communication systems. The algorithm of cross product automatic frequency control (CPAFC) and frequency bin technology is used for tracking larger frequency deviation. The paper gives out a scheme of digitized carrier synchronization loop, in which the digitized Costas loop is used as a basic part while CPAFC and frequency bin technology as auxiliary. Then we validate the algorithm’s correctness by establishing a dynamic simulation model of the loop, in which we obtained some experiential values of certain parameters. Based on the earlier work, we implemented the algorithm by digital signal processor (DSP), which makes a further validate of the algorithm.Finally, the paper gives out a scheme of digitized carrier synchronization loop for software defined radio receiver which is based on the hardware platform composed of FPGA and DSP.

  • 【分类号】TN919.34
  • 【被引频次】42
  • 【下载频次】2367
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