节点文献

纳米级集成电路分辨率增强技术研究

Research on Resolution Enhancement Technology of Nanometer-scale IC

【作者】 马玥

【导师】 严晓浪; 史峥;

【作者基本信息】 浙江大学 , 电路与系统, 2006, 硕士

【摘要】 半导体制造工艺从0.18μm技术节点开始,“亚波长光刻”技术被广泛采用。在亚波长光刻下,由于掩模制造、光刻和蚀刻过程中光的衍射及其它物理现象,导致掩模图形和硅片表面实际印刷图形之间不再一致。版图图形转移过程中的失真,将会影响到产品的性能参数,并降低集成电路的成品率。为了消除这些负面影响,越来越多的分辨率增强技术被开发和应用,其能够较好地解决集成电路主要的可制造性问题,成为当前全世界集成电路工业界和学术界关注的焦点。 本文即针对这一技术开展研究,主要围绕纳米级集成电路条件下分辨率增强技术的理论和算法以及具体实现等问题展开。本文介绍了集成电路物理设计和光刻工艺的基本技术背景。介绍了一种适用于超深亚微米和纳米级集成电路实际生产的光刻模型建模和优化的基本框架以及快速光刻模拟算法。以模型框架和模拟算法为基础,本文提出了一类OPC算法和工具语言框架,实现了EDA工具NanoOPC。本文还对移相掩模相位分配及兼容性检查的算法进行了研究,完成EDA工具NanoPSM。同时,基于对版图关键尺寸检查算法的研究和改进,实现了适用于散射条插入的EDA工具NanoSBar。各EDA工具的有效性也在文中通过实例得到充分证明。

【Abstract】 Beginning from the 0.18um technology node, the so-called Sub- Wavelength Lithography has been widely used in semiconductor processes. Because of diffraction and other physical phenomena during mask making, optical lithography and etching under Sub-Wavelength Lithography, the mask patterns are not the same as printed shapes on silicon wafer. The distortions in pattern transfer may influence the functionality and performance of IC products and lower the production yield. In order to solve the incurring manufacturability problem for higher yield, more aggressive Resolution Enhancement Technologies are developed and deployed. It becomes one of the most concerned issues for global IC industry and academia now.The theories and algorithms of Resolution Enhancement Technologies for nanometer-scale IC are the major research objects of this thesis. Basics of IC physical design and photolithography are described. A new framework of lithographic modeling and optimization along with the fast simulation algorithms are presented as well. Based on this framework and simulation algorithms, a new framework of Optical Proximity Correction approach with new scripting language is developed. An EDA tool named NanoOPC based on this framework is implemented. New methodology of phase assignment for Phase Shifting Mask and the implementation of an EDA tool named NanoPSM are thereafter introduced. Based on the improvement of algorithms for critical dimension checking, a new EDA tool named NanoSBar for Scattering Bar Insertion is implemented. The performance of these EDA tools is demonstrated by applications.

  • 【网络出版投稿人】 浙江大学
  • 【网络出版年期】2006年 08期
  • 【分类号】TN405
  • 【被引频次】2
  • 【下载频次】224
节点文献中: 

本文链接的文献网络图示:

本文的引文网络