【作者】 张诗娟；

【导师】 刘三清；

【作者基本信息】 华中科技大学 ， 微电子学与固体电子学， 2005， 硕士

【摘要】 在现代先进的电子系统的前端和后端都将应用到A/D转换器,以改善数字处理技术的性能。在各种A/D转换器中,逐次逼近型A/D转换器是采样率低于5 Msps(每秒百万次采样)的中等至高等分辨率应用的常见结构。由于逐次逼近型A/D转换器具有低功耗、小尺寸的特点,因此有很宽的应用范围,例如便携/电池供电仪表、笔输入量化器、工业控制和数据/信号采集器等。本文设计了工作在2.7 ~ 5.25 V单电源电压下,典型吞吐率达1 Msps的12位、高速、低功耗的逐次逼近式A/D转换器。D/A转换器和比较器的性能对逐次逼近式A/D转换器的性能影响很大,因此本文主要研究D/A转换器和比较器的设计,只要这两部分的设计满足一定的性能要求,逐次逼近A/D转换器就能很好的工作。设计中D/A转换器采用了加电容分压器的电荷分布式结构,在扩展并行D/A转换器分辨率的同时大大节省了芯片面积。设计的比较器结构是低增益、高带宽的前置放大器后面再紧跟一个动态锁存形式,既满足了高速比较的要求,又有效降低了功耗。在高分辨率的A/D转换设计中,采样/保持电路的设计也是非常重要的,本设计采用了下极板采样技术,可以有效地避免电荷注入效应引起的信号失真。仿真结果表明,设计的高速比较器、D/A转换器满足12位A/D转换的要求,逐次逼近A/D转换器可以正常的工作。更多还原

【Abstract】 In the front and the end of the advanced electronics systems, analog to digital converters (A/D converters) are applied to improve the performance of the digital processing technique. Of all kinds of A/D converters, successive approximation (SAR) A/D converters are frequently the architecture of choice for medium-to-high-resolution applications with sample rates under 5 mega samples per second (Msps). Because of providing low power consumption as well as a small form factor, SAR A/D converters have a wide variety of applications, such as portable/battery-powered instrument, pen digitizers, industrial controls and data/signal acquisition. A 12-bit high speed, low power, SAR A/D converter is designed, which operates from a signal 2.7 V to 5.25 V power supply and features throughput rates up 1Msps. Performances of digital-analog (D/A) converters and comparators have a very deep influence on SAR A/D converters, so the research of the two parts’ design is focused on. If they can have good performances, SAR A/D converters can work well. A charge scaling D/A converter with capacitor voltage divider is designed, which extends the resolution of a parallel D/A converter as well as reduces the chip area greatly. For the design of comparator, the architecture of low-gain and high-bandwidth preamplifiers followed by a dynamic latch is employed, which satisfies the requirement of high speed and reduces the power consumption. For the design of high resolution A/D converters, the design of the sample and hold circuit is very important. Here the bottom plate technique is employed, which can cancel the charge injection error. The simulation shows that the high speed comparator and the D/A converter meet the requirements of the 12-bit A/D converter, and the SAR A/D converter can work well.更多还原