【作者】 廖勇明；

【导师】 龚敏；

【作者基本信息】 四川大学 ， 微电子学与固体电子学， 2005， 硕士

【摘要】 红外成像系统在国民经济中得到广泛应用,红外焦平面阵列是红外成像系统的核心部件。本论文从微测辐射热计阵列的制作出发,研究了热敏材料多晶硅,设计了全镂空的悬臂梁阵列结构,首次采用将体硅工艺和表面硅工艺结合起来成功的制作了阵列结构,根据阵列的结构特点和阵列制作工艺与CMOS工艺的不兼容,提出了阵列结构与CMOS信号电路的集成方案。本论文的主要工作和成果有: 1)用SiH₂Cl₂沉积了多晶硅薄膜,用扫描电镜、干涉法膜厚测试仪、X射线衍射仪、薄膜应力测试仪对薄膜进行了研究,得出在950℃时用SiH₂Cl₂可以快速沉积低应力的多晶硅薄膜。 2)制作了不同掺硼浓度和退火温度的多晶硅电阻,测试了阻值随温度的变化,在掺硼浓度和退火温度分别为5×10¹⁴/cm²和900℃时得到了接近1‰的TCR值。分析得出:在中等掺杂的情况下,多晶硅的TCR随掺杂浓度的降低和退火温度的升高而增加。 3)设计了全镂空悬臂梁阵列结构,对阵列结构的热隔离进行了理论分析,得到单元阵列的总热导为1.73×10^-6（W/K）。设计了双保护的阵列工艺流程,成功制作了16元的线阵列和16×16元的面阵列。 4)根据制作阵列的工艺过程和结构特点,提出了阵列和CMOS信号电路的集成方案。更多还原

【Abstract】 Infrared imaging system was wide applied to national economy, and infrared focal plane array is the core of infrared imaging system. Beginning with the fabrication of micro-bolometer array in this thesis, thermally sensitive polysilicon was studied. The array structure with free-standing stencil cantilever was designed and successfully fabricated with the technique of bulk micromachining and surface micromachining. The integration project of array structure with a CMOS circuit was brought forward according to characteristics of the array structure and the process is not compatible with CMOS. Primary work and result in this thesis are displayed as follows:1. Polysilicon film was deposited with SiH₂Cl2 and was studied with scan-electronic-mirror（SEM）, following with X radial diffraction （XRD） and film stress measurement. The film thickness was measured by interferometer. Low-stress polysilicon film has been obtained by the chemical vapor deposition （CVD） using SiH2Cl2 at temperature 950°C.2. The resistivity of the polysilicon films could be controlled under different dopant （boron） concentration and different anneal temperature. The changes of resistance with the temperature were measured. The temperature coefficient of resistance （TCR） value was about 1‰ when the boron concentration was 5X 10 /cm and the anneal temperature was 900℃. Influence of the doping concentration and the anneal temperature to TCR were analyzed, in which TCR was increased with the decrease of dope concentration and the increase of anneal temperature.3. The array structure with free-standing stencil cantilever was designed. The thermal isolation effect of array structure was theoretically analyzed, with the total thermal conductance of each pixel 1.73* 10’6 （ W/K ） . The double-protection technology was designed, by which 16 pixels line-array and 16x16 pixels plane-array were successfully fabricated.4. Integration project of array with CMOS signal circuit was brought forward according to the fabrication process of plane-array sensor and its structure characters.更多还原