【作者】 杜生海；

【导师】 刘让苏；

【作者基本信息】 湖南大学 ， 微电子学与固体电子学， 2005， 硕士

【摘要】 小波变换是一种新兴的理论,是数学发展史上的重要成果。它无论对数学还是对工程应用都产生了深远的影响。最新的静态图像压缩标准JPEG2000就以离散小波变换(DWT)作为核心变换算法。 本文首先较为详细地分析了小波变换的理论基础,对多分辨率分析、Mallat算法和提升算法做了介绍。然后分析了JPEG2000所采用的小波滤波器,并引入了一个新的LS97小波。该小波系数简单、易于硬件实现,并且与CDF97小波有很好的兼容性,可作为CDF97小波的替代者。使用Matlab对CDF97小波和LS97小波的兼容性做仿真测试,结果表明这两个小波具有几乎相同的性能。在确定所用的小波后,本文设计了二维离散小波变换的硬件结构。设计过程中对标准二维小波变换做了优化,即将行变换和列变换的归一化步骤合并计算,这样可以减少两次乘法操作。另外还使用移位加代替乘法,提取移位加中的公共算子等方式来优化设计。对于边界数据的处理,本文采用了嵌入式对称延拓技术,不需要额外的缓存,节约了硬件资源。为提高硬件利用率,本文将Le Gall 53小波变换和LS97小波变换统一起来,只要一个控制信号就可实现两者之间的转换。本文所提出的结构采用基于行的变换方式,只需要六行中间数据即可完成全部行数据的小波变换。采用流水线技术提高了整个设计的运行速度。最后也给出了二维离散小波反变换的实现结构。 在完成硬件结构设计的基础上,使用Verilog硬件描述语言对整个设计进行了完全可综合的RTL级描述,采用同步设计,提高了可靠性。在Xilinx公司的FPGA开发软件ISE6.3i中对正反小波变换做了仿真和实现,结果表明,本设计能高速高精度地完成正反可逆和不可逆小波变换,可以满足各种实时性要求。更多还原

【Abstract】 Wavelet transform is a very important production in the phylogeny of mathematics. Though wavelet transform is a new theory, it has strongly impacted on both mathmatics and engineering applications. The discrete wavelet transform (DWT) has been used as the core transforming technology in JPEG2000, a newest static image compression standard.Firstly, this thesis analyzes the theory fundamental of wavelet transform in details, and also introduces multi-resolution analysis (MRA), Mallat algorithm and Lifting Scheme. Then both the wavelet filters adopted in JPEG2000 and a new filter LS97 are introduced. The LS97 wavelet characterizes simple coefficients, being easy to implement with hardware and good compatibility with the CDF97 wavelet, so it can be used as a substitute for CDF97. A Matlab simulation is performed to test the compatibility between CDF97 and LS97, and the results show they almost have same performance. After selecting wavelet filters, this thesis designs the architecture of 2-D DWT. In the course of design, some approaches are applied to the normal 2-D DWT for optimizing the architecture, such as combination of scale step in DWT for rows and for columns which can reduce the number of multiplication by 2 times, substituting shift-add for multiplication and extracting common operator in the shift-add, etc. The embedded symmetric extension technology is used for the calculation of data in the boundary, so the architecture need not the additonal RAMs for data extension. To improve the percentage of hardware utilizing, this thesis combines the Le Gall 53 wavelet with the LS97 wavelet, and just one signal can control the switch of two DWT filters. In order to reduce the size of inner RAMs, a line-based approach for the implementation of the wavelet transform is used, so the architecture can complete DWT for the whole image using only 6 rows of inner RAMs. The frequency of the design is largely improved by using pipeline technology. At last, the architecture of inverse DWT is also proposed.On the basis of the architecture, the thesis describes the whole design in Verilog HDL at the full synthesizable RTL level with synchronous design technology. The simulation and implementation of forward and inverse DWT are performed on Xilinx’s ISE6.3i, and the results show that the design can quickly and precisely complete forward and inverse DWT with reversible (Le Gall 53) and irreversible (LS97) filters, and can meet the real-time requirements for all kinds of application.更多还原