高效低噪声电荷泵设计研究

【作者】 曹亮；

【导师】 刘强； 张波；

【作者基本信息】 电子科技大学 ， 微电子学与固体电子学， 2005， 硕士

【摘要】 本文分析、设计并成功流片了一种高效率低噪声电荷泵DC/DC 转换器。它采用0.5μm CMOS 工艺,输入电压范围为2.7～4.5V,输出电压为5±4%V。具有关闭控制功能,在关闭状态下消耗电流小于1μA;具有软启动功能,可减小启动时的电流过冲;具有短路及过热保护功能,工作温度范围为-40～+85℃。在电路设计中,基于电荷泵DC/DC 转换器的基本原理和拓扑结构,给出设计理论依据,并根据功能需要进行了电路的总体结构设计和子电路模块设计。重点分析了典型子电路模块:误差放大器、振荡器、带隙基准源等电路原理,并针对它们在高效率低噪声电荷泵DC/DC 转换器的应用提出了改进。在完成电路原理分析与电路设计的基础之上,应用EDA 软件HSPICE 对各个子电路模块和整体电路进行了功能仿真及量化模拟,仿真结果均达到或优于预定指标,验证了作者在本文中阐述的线性电荷泵DC/DC 转换器的设计理论,是设计理论与实践相结合的一次有价值的尝试。在电路理论中,本课题提出了一种新型PFM 控制型电荷泵,与传统电荷泵相比,在芯片轻负载时,它具有更高的转换效率、更低的静态电流等优点。最后在完成电路仿真、版图设计、以及后仿真工作后在境外一著名Foundry成功流片并完成测试,测试结果表明芯片功能正确。更多还原

【Abstract】 A high-efficiency low-noise charge pumping DC/DC converter is analyzed in this paper and the chip was taped-out successfully by using 0.5um CMOS process with wide input voltage range of 2.7V to 4.5V to generate high output voltage precision 5±4%V. With the “linear”modulation technique, no inrush current generates when chip starts up and the supply current is no more than 1μA when user disables the chip. This converter can operate normally in the temperature range of -40℃to 85℃according to the design data. The author gived principle analysis based on topology of charge pump DC/DC converters, and designed the whole diagram chip and sub block.Typical sub block was analysised such as: Error Amplifier,Oscillator,Bandgap Reference etc.And improvement was proposed based on their application in high efficiency low-noise charge pump DC/DC converters. Based on the charge pump principle analysis and circuit design in the beginning chapters, the author simulated all the sub block circuits and whole chip circuit by applying EDA tools HSPICE and CADENCE, the simulation result indicates that the IC has achieved the expectation, both function target and electrical characteristics. In circuit design, a novel high-efficiency charge pump with Pulse Frequency Modulation(PFM) control is proposed in this paper. Compared with the conventional linear control charge pump, the PFM control charge pump offers lower quiescent current, higher efficiency and low output ripple, especially in low load condition. After completing circuit simulation, Layout and Post-layout Simulation, we taped-out the chip successfully in famous Foundry abroad and completed test.. Test result proves the function of the chip.更多还原