AS1773光纤控制总线协议芯片的实现及相关接口研究

【作者】 谢烨；

【导师】 周东；

【作者基本信息】 电子科技大学 ， 光学工程， 2005， 硕士

【摘要】 AS1773 总线是由SAE(Society of Automotive Engineers)颁布的一种机载内部光纤总线的标准,它是在MIL-STD-1553 和MIL-STD-1773 的基础上发展起来的,这两个标准现已获得广泛的应用。AS1773 总线具有可靠性高、抗电磁干扰能力强、重量轻、组网方式灵活等优点。当前航空电子系统对数据信息的交换能力提出了更高的要求, AS1773 总线可以进行双速率的传送(1Mbps 和20Mbps),既可以和原有的1Mbps 的设备相兼容,也可以在更高的速率上进行传输,满足了航空电子总线的要求。本论文详细分析了AS1773 协议,在此基础上,用FPGA 实现了该协议,并在芯片内部增加了和主机的PCI 接口。本论文的主要任务就是在完成协议分析的基础上用FPGA 设计出1773 总线的协议芯片。论文首先介绍了AS1773 标准的出台及其发展历程,接着介绍了协议的主要内容并进行了相应的分析。在以上分析的基础上提出协议芯片的总体设计方案,分析各个模块的功能需求,给出子模块的设计框图及流程图。接着对所使用的器件和开发环境进行了简要的介绍,在论文的最后,介绍了各个子模块的VHDL 语言设计及相应的时序仿真结果,并给出验证协议芯片功能所需电路板的设计及硬件调试结果,本设计达到预期的结果。更多还原

【Abstract】 AS1773,issued by SAE(Society of Automotive Engineers),is a standard of an avionic internal fiber optics bus,which comes into being based on MIL-STD-1553 and MIL-STD-1773. MIL-STD-1553 and MIL-STD-1773 have been used widely.AS1773 have merits such as high-reliability,strong anti-EMP/EMI ability,lower weght and flexible networking,so we can form a helicopter fiber-optic control system which have high performance based on it.Today avionic device system need more excellent capability to exchange data, AS1773 bus can provide 1Mbps and 20Mbps speed,which have compatibility with the device that have 1Mbps ,and it also can work at 20Mbps.So AS1773 can satisfy the need that avionic device system require. In this paper,we will ananyse this protocol, based on it, then use FPGA to implement the protocol chip, and added PCI interface in this chip.The major mission of the paper is to design the AS1773 protocol chip on the basis of protocol analysis. At a first, paper introduces the development history and issue of the AS1773 protocol, then introduce it’s main content and analyses for it. According to the preceding analysis result, the paper gives the whole design scheme. And on the analysis of the function requirement of submodule, the paper advances the whole moule design diagrams and flowchart. Following that, the paper introduces the device and development environment used in the project. Then the paper introduces the VHDL design of submodules and the corresponding simulation results. In the end, the debug board used to verify chip function and the hardware debug results was given. According to the hardware debug result, the chip achieves the expected result.更多还原