SDH专用分接器的研究与实现

【作者】 陈桂培；

【导师】 林水生；

【作者基本信息】 电子科技大学 ， 信息与通信工程， 2005， 硕士

【摘要】 同步数字体系(SDH)和同步光纤网络(SONET)在世界范围广泛应用于城域主干网,长途通信网和广域网。SDH 是一种结合了高速大容量光纤传输技术和智能网络技术的传输体制。它能提供方便有效的数据复用和解复用功能,并能可靠地传输数据。本论文阐述了“SDH 专用分接器”的研究和实现。论文先分析了SDH 相关协议,然后对“SDH 专用分接器”的实现指标进行分析,根据项目的具体要求,结合传统SDH 设备的设计方案,提出了在单板上实现项目所提指标。在该方案的基础上,进行硬件设计,软件开发平台的搭建,部分单板驱动底层软件的编程和基于FPGA 的逻辑设计。在软硬件设计时,对结构功能进行进一步的细化、模块化,分为:E1支路信号分接;DS3 支路分接;STM-1 输出。本论文方案设计从具体的项目需求出发,在对现有通用光传输设备的分析基础上,提出自己的设计方案,并对方案的可行性进行了论证。本论文硬件设计部分涉及到高速混合信号电路设计,光模块的输出信号速率高达2.5G,在PCB 设计中,充分考虑信号完整性设计及电磁兼容设计。对阻抗控制,阻抗匹配和端接从理论上和工程实现上进行了较为详尽的分析。本文软件设计分为两个部分,四个层次,即软件开发平台建立部分(包括MCF5249 的BOOTLOADER 设计和μclinux 在MCF5249 上的移植)和驱动程序和应用程序设计部分。更多还原

【Abstract】 Synchronous Digital Hierarchy (SDH) and Synchronous Optical Network (SONET) are now applied worldwide both in carrier backbone networks, by metropolitan service providers and in large scale WANs by end-user organizations. SDH is an optical-based carrier network using synchronous operations between components. It provides high availability and very reliable transport with powerful multiplexing and demultiplexing capabilities. This dissertation addresses the research and realization of “the specific demultiplexer of SDH”. At first, the author anylizes the correlative protocols, and then anylizes the targets of “the specific demultiplexer of SDH”, and takes the specific demands of project into full consideration. On the basis of analysis and consideration of theses, the author gives out the design scheme. Then the author does hardware design, builds the background of the software development, and compiles the programme of the bottom driver, and does some logic design basing on the FPGA. When doing hardware and software designs, the author divides the construct function into some modules. The modules are the demultiplexer of E1 signal, the dumultiplexer of DS3, and the output of the STM-1。After having analized the specific targets of the project, the author analizes the current communication devices, and then puts forward the scheme of the project. The author demonstrates the feasibility of the scheme also. The hardware design of this dissertation involves the high speed and mix signal electronic design. The speed of the signal, output from the optical module, is about 2.5Gbps. During the Printed Circuit Board design, the author takes the signal integrity and electromagnetic interference design into full consideration. The author analizes the impedance control, impedance matching, and termination schemes from the theory reseach to the realization of engineering in detail. The software design of the dissertation is separated into two parts更多还原