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高速数字电路设计中信号完整性分析与研究

Analysis and Research of Signal Integrity in the Design of High Speed Digital Circuit

【作者】 周传璘

【导师】 陈伟;

【作者基本信息】 武汉理工大学 , 通信与信息系统, 2005, 硕士

【摘要】 随着微电子技术和计算机科技的不断发展,高速器件的使用和高速数字系统设计越来越多。在这种设计中,由于系统时钟频率的迅速提高、信号跳变沿不断缩短和电路集成度不断增加,印刷电路板的线迹互连和板层特性对系统电气性能的影响越来越突出。 对于低频电路设计,互连关系视为集总参数,线迹互连和板层特性的影响可以不考虑。在高速数字电路设计中,一段导体不仅仅是导体,也成为具有分布参数的传输线,互连关系必须以传输线考虑,也必须考虑印刷电路板板材的电参数。因此,高速数字电路设计必须面对互连延迟引起的反射、串扰、过冲、振荡和同步开关噪声等信号完整性问题。 信号完整性问题能导致或者直接带来信号失真、定时错误、不正确数据以及系统误工作甚至系统崩溃,解决不好会严重影响产品性能并带来不可估量的损失。因此对于高速系统而言,在设计的过程中必须考虑信号完整性问题,并对设计进行仿真分析。 合理进行电路建模仿真是寻找信号完整性问题解决方法的重要途径。通过仿真分析,可以在PCB制作之前尽可能地发现隐藏的信号完整性问题,最大限度地减少因为信号完整性问题而导致的产品设计失败的概率,使产品一次开发成功成为可能,从而缩短开发周期,降低开发成本。 文章对高速数字电路设计中的信号完整性作了比较详细的分析与研究。主要内容是:介绍了分析和研究高速数字电路设计中信号完整性基础理论,包括高速电路理论、电磁场理论和传输线理论;在理论上分析了产生反射、串扰和同步开关噪声的原因;在实践上,利用了IBIS模型,结合Mentor公司的Hyperlynx仿真软件对给定电路模型进行反射、串扰仿真,并给出了通过端接技术减小反射的仿真波形和通过改变传输线间的距离和传输线长度对串扰的影响的仿真波形。总结了解决反射、串扰和同步开关噪声的方案或措施;探讨了高速数字电路设计中进行信号完整性仿真分析的策略。

【Abstract】 With the development of the microelectronics technology and computer science, they have become more and more the designs of high speed digital systems and the use of high speed devices. In this kind of design, because of quickly raised systematic clock frequency, continuously shorten signal jump edge, and increased integrated degree of circuit, the line’s mutual link of printed circuit board and board layer’s property have influenced more and more greatly the systematic electrical performance.For the design of low frequency circuit, the mutual link relations can be regard as lumped parameters, and the influence of line’s mutual link and board layer’s property can be neglected. In the design of high speed digital circuit, a segment of the conductor not only is a conductor, but also becomes a transmission line with distributed parameters. The mutual link relations must be considered as transmission line, and the electric parameter of the printed circuit board is also considered. Therefore, the design of high speed digital circuit must face the signal integrity problems, such as reflection, crosstalk, overshoot, oscillation and simultaneous switching noise, all of which are caused by the postponement of mutual link.Signal integrity’s problems may cause or directly bring about signal distortion, wrongly timing, incorrect data, as well as working wrongly of the system, and even system’s collapse. Improper solutions may affect seriously product’s performance, and even bring immeasurable loss. Therefore, for the high speed system, the signal integrity must be taken into consideration and simulation analyses be conducted in the process of circuit design.It is an important method of solving signal integrity problems to build model and carry out simulation of circuit in reasonable way. By simulating analysis, the hidden problems of signal integrity can be discovered to the greatest extent before PCB being made, and the probability of the failure that is caused by signal integrity problems is reduced at the lowest lever in designing products, then it can be possible that products be developed only one time and succeed, so the development period is shorten and the cost is reduced.The signal integrity in the design of high speed digital circuit is analysed andresearched in detail in this paper. The main contents include: to introduce the fundamental theories of signal integrity’s analysis and research in the design of high speed digital circuit, including high speed circuit theory, electromagnetic field theory and transmission line theory; to analyze the reasons of reflection, crosstalk and the simultaneous switching noise in theory; in practice, by IBIS model, to simulate the reflection and crosstalk of the circuit model using the Hyperlynx simulation software of Mentor company, and to show the waveforms of reducing reflection by using termination technique and the waveforms of the crosstalk’s influence with changing the distance of transmission lines and the length of transmission lines. It summarized the solutions to reflection, crosstalk and the simultaneous switching noise, and discussed the strategy of signal integrity simulating analysis in the design of high speed digital circuit.

  • 【分类号】TN702
  • 【被引频次】39
  • 【下载频次】1721
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