DQPSK数字接收机的设计与实现

【作者】 赵建宏；

【导师】 雷维礼； 陈颖；

【作者基本信息】 电子科技大学 ， 通信与信息系统， 2004， 硕士

【摘要】 本论文所研究的课题是电子科技集团第十研究所某电台直扩序列数字接收机的子课题,目标是在FPGA上实现满足设计指标的DQPSK数字接收机。要求对于载频为xxMHZ(可暂时自定)采用DQPSK调制方式的中频信号,在载波频偏低于±3KHZ的情况下,能实现载波跟踪,并在实验环境中对码速率为1M 波特率的调制信号完成正确解调,实测曲线在3dB信噪比范围内逼近理论曲线,且满足输入信号的动态范围不小于20dB。本论文首先介绍了当前通信系统发展的数字化、软件化趋势以及实现数字通信系统的方法的发展。然后,介绍了本课题的来源、设计目标和技术路线。第二章给出了发射机的基本原理,从信号分解的角度用数学方法对调制作了分析。然后,在分析高斯白噪声信道中最佳接收机原理和各种最佳设计准则、硬件结构的基础上,详细阐述了该DQPSK数字接收机系统的方案设计。然后,基于该方案设计,阐述了如何用MATLAB软件对接收机系统进行仿真,从而初步验证了方案设计的正确性。之后,用VHDL硬件设计语言实现系统方案,用Xilinx 的EDA工具或者内嵌的第三方工具完成功能仿真和时序仿真。最后,将仿真成功的VHDL程序编译后下载到FPGA进行调试,最后获得了较为满意的结果。总之,论文从随机信号检测的角度阐述了数字接收机的基本原理与方案设计,详细阐述了不同阶段两级仿真的过程、方法,同时也给出了实现数字系统的调试方法和过程,对于一般的数字通信系统的设计开发具有普遍的借鉴意义。最后,测试结果表明完成的DQPSK数字接收机达到了相应的指标要求。它可以跟踪±3KHz范围内的载波频偏,对在-8dBm~+16dBm动态范围内(A/D前端不加AGC)的1M 波特率中频输入信号,实现了正确解调。更多还原

【Abstract】 This paper focus on a sub-project of the direct spread spectrum sequence digital correlator project from China Electronics Technology Group Corporation the No. 10th Research Institute(SWIET). The design objective is to implement a DQPSK digital receiver based on FPGA devices. For QPSK modulation IF signal with the 1MHz symbol rate, when the shift of carrier wave frequency within ±3KHZ, the receiver to be implemented can track and lock the carrier wave frequency and successfully complete demodulation under the lab’s test environment. At last, require receiver’s BER curve will approach the ideal BER curve within 3dB SNR, and require the receiver’s dynamic range is not below 20dB.After introduction of the digitalization, softwarization and implementation methods for communication systems, this paper bring out the background , objective and design plan of this sub-project. And then, It discusses the transmitter’s basic conceptions, and analyses the modulation methods from the mathematic viewpoint. And, based on the several optimum design principles, this paper make a detail description about the digital receiver’s system design. And then, it focus on the system simulation using MATLAB and VHDL programming. After this, the paper gives out the second step simulation result from the XINLINX EDA Tools. At last, download the design into FPGA and make a system debug until getting a satisfied conclusion.One of the word, this paper gives out the digital receiver’s basic theory from the viewpoint of random signal processing, gives out the details about system design, and gives out the procedure of two simulation steps and debug. This procedure can be generalized in other digital product’s research.Finally,the test results showes that the design target is obtained. The receiver can correctly demodulate the IF DQPSK signal with the dynamic range (no AGC before A/D converter)between -8dBm~+16dBm.更多还原