DSP/CPLD在惯性导航中的应用

【作者】 赵鸿；

【导师】 赵忠；

【作者基本信息】 西北工业大学 ， 精密仪器及机械， 2004， 硕士

【摘要】 该论文主要研究如何用数字信号处理芯片(DSP：TMS320VC33PGA120)和复杂可编程逻辑器件(CPLD：EPM7128STC-100)作为数字硬件平台，实现捷联式惯性导航系统(SINS)高速实时数据处理的硬件、软件设计。 论文首先阐述了惯性导航系统的特点和发展现状及论文研究的应用背景及必要性，着重分析、推导了捷联式惯性导航系统的力学方程编排。然后，研究了DSP芯片结构体系的特点，绘制了硬件电路系统的原理图和PCB图，且采用Verilog HDL硬件描述语言编写了复杂可编程逻辑器件(CPLD)的译码与部分数据处理程序。其次，在CCS’C3x-’C4x编译环境下，采用C语言和汇编语言混合编程的方式，初调了硬件电路系统的各个端口，分析了DSP芯片的中断和Bootloader机制，开发了飞行轨迹数据生成系统。最后，结合捷联式惯性导航系统算法流程，对硬件电路系统进行了测试验证，并给出了测试结果。 测试结果表明，以DSP／CPLD作为导航计算机硬件平台的捷联式惯性导航实时数据处理系统能够满足系统所要求达到的高精度、实时性、稳定性要求，使捷联式惯性导航系统具有更好的应用价值、市场前景和军事意义。更多还原

【Abstract】 The paper mainly focuses on the software and hardware design that the data real-time processes of the SINS, using the DSP and the CPLD as the digital hardware platform.First, the paper describes the development of the SINS and the practical engineering background of the thesis, emphatically analyses and fomulates Mechanical Calibration Equation of the SINS. Then, the author specially studies the characteristic of system architecture of the DSP, paints schematic principle diagram and PCB diagram of the hardware circuit system, writes the program decoding and partial data processing of the CPLD, adopting Verilog HDL hardware describing language. In CCS’C3x-’C4x compile environment, using composite programming method of C and Assemble language, the author debugs each port of the hardware circuit system, analyses interrupts mechanism and bootloader mechanism of the DSP, develops the system of generating flight orbit data. Finally, combining algorithm flow-chart of the SINS, all work realizes test and validation of the hardware circuit system.The test result demonstrates that the real-time data processing system can satisfy the request of high precision, rapid speed, high reliability of the SINS, make the SINS having great value of application, better future of market and great significance of military.更多还原