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光栅数显装置的集成化设计及数字锁相环的研究

The Integrated Design of Grating Digital Readout and Study of Digital Locked-phase Loop

【作者】 杨孟华

【导师】 金喜平;

【作者基本信息】 沈阳工业大学 , 测试计量技术及仪器, 2002, 硕士

【摘要】 本文简要介绍了光栅检测装置在国内外的发展动态及光栅测长的基本原理,对比分析了一些传统的莫尔条纹细分方法的优、缺点及适用范围。 基于锁相倍频细分方案,进而提出了采用大规模在系统可编程器件来实现集成化设计的方案。文中将在系统可编程器件和相应的硬件描述语言VHDL作了简要介绍,本文还详细介绍了基于锁相细分理论和ISP设计思想的高集成度的光栅检测装置。 该方案采用软硬件相结合的方法,系统硬件设计具有模块化和多用化的特点,软件针对硬件特点编写,文中给出了各部分硬件电路的基本组成及实现的功能、软件的主程序及各功能子程序的流程图和各子电路的功能仿真。 新型的集成化设计方案具有以下特点:细分数高而且调整方便;采用累积计数,避免大小数分别计数的不协调;细分同时完成辨向;可以在ISP器件内完成计数功能,从而提高了计数器的最高工作频率;同时将方波发生器和一些外围的数字电路集成在一片ISP器件内,提高了系统的集成度,性能可靠稳定;具有硬件设计软件化及在系统可编程的特点,便于电路的修改和功能的扩展。 用ISP设计的适合于光栅检测装置的数字锁相环在第七章作了简要的介绍。系统调试及实验证明了集成化设计方案在实际应用中的可行性。针对栅距为20μm的光栅传感器完成了20细分,分辨率达到1μm。

【Abstract】 In this paper, measurement principle and development state of optical grating technology are briefly introduced. The advantages and disadvantages of several classical Moire fringe division methods are analyzed and compared with each other.Based on Phase-Locked Multi-Frequency division method ,and then a method of using LSI-ISP devices to design to realize integrating designation .This paper briefly introduced ISP devices and hardware description language VHDL ,and designs a kind of high integrated grating digital readout based on division theory and ISP design theory.The scheme combines the hardware design with software program, which have the features of modularization and all-purposes. The paper gives the basic constitute and function of each part of the hardware circuit, and the follow chart of the main-program and sub-program.The features of the new type of integration scheme can be described as follow: high division and easy debug are achieved in the scheme; accumulative total is used, and the discord of integer part and decimal part are avoided in the scheme; it can divide as well as detect direction; it can integrate the counter into ISP device and then evaluate the maxim frequency of the counter; it also integrate square wave and some logic devices into ISP device, and then improve integration, reliability, stability; and have the character of software designation instead of hardware designation and in-system programming, and it becomes very easy to modify the circuit and to extend the function.The digital phase-locked loop designed by ISP, which is adapted to optical grating readout is briefly introduced. System debugging and experiment procedure proves the feasibility of the integration theory. When the pitch of the grating sensor is 20μm, the system can achieve 20 division, and the system minim resolving power is 1μm.

【关键词】 光栅细分VHDL在系统可编程锁相倍频
【Key words】 GratingDivisionVHDLISPPhase-Locked Multi-frequency
  • 【分类号】TP21
  • 【被引频次】7
  • 【下载频次】388
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