CMOS/SOI与铁电存储器（FeRAM）的工艺研究

【作者】 范秀强；

【导师】 林成鲁；

【作者基本信息】 中国科学院上海冶金研究所 ， 微电子学与固体电子学， 2001， 硕士

【摘要】 SOI电路具有高速、低压、低功耗、抗辐照、耐高温等优点，由于SOI材料的成本较高，原来它的应用主要局限在军工、航空航天等领域来制作耐高温和抗辐照电路。随着SOI衬底制备技术的发展，SOI国片成本不断降低，使得SOI进入民用成为可能。随着移动通信、笔记本电脑等便携式电子产品发展，SOI将成为实现低压、低功耗的主流技术。由于SOI技术也是国防微电子的核心技术之一，长期以来，西方国家一直在材料等相关技术方面对我国实施限制与禁运。按照中国科学院知识创新工程项目《SOI材料与器件》的要求，本论文详细研究了CMOS/SOI器件工艺，进行了CMOS/SOI十二位D/A，八位A/D转换器电路的研制工作。作为本论文的另一方面，本文还根据“863”任务的需要研究了在信息领域有重要应用前景的铁电存储器，铁电存储器（FeRAM）是一种非挥发性存储器。它与普通的浮栅存储器（E²PROM）相比，FeRAM具有写操作速度快、可重写次数多、功耗低等优点。近几年来对它的研究一直是集成铁电学领域内研究的热点。结合以上两方面的任务，本论文主要进行了以下几方面工作： 1．根据SOI电路的特点，与四川固体电路研究所合作，参与了CMOS/SOI十二位D/A、八位A/D转换器讨论与设计的部分工作。在D/A转换器设计中采用了3+9分段结构，对高三位数字量进行3-7温度编码，在没有进行激光调阻的情况下，达到设计所要求的非线性误差，提高了转换器的精度。在A/D转换器的设计中，采用了分级并行转换电路，在牺牲一定的电路速度的情况下，降低了电路制备的难度。 2．对CMOS/SOI晶体管的工艺进行了研究。采用多次氧化对SOI衬底的顶层硅进行减薄，成功制备出全耗尽的MOS晶体管。优化了MOS晶体管掺杂工艺；使它的阈值电压达到预定要求。发现注入能量和注入杂质分布是影响掺杂的主要因素。在工艺上采用的注入条件为：20～30nm缓冲氧化层；注入能量为40KeV；注入剂量4～8×10¹²/cm²。 3．在对SOI器件工艺研究的基础上，对CMOS/SOI工艺流程进行了优化。利用顶层硅厚度为2400A的P型SOI衬底，参与四川固体电路研究所的流片工作，成功地制备出CMOS/SOI十二位D/A转换器和CMOS/SOI八位A/D转换器。并对制备的CMOS/SOI A/D、D/A转换器相关功能测试的结果进行了分析。 4．自行设计了4×8位铁电存储器，完成了4×8位1C/1T铁电存储器阵列的版图设计、制版。 5．对铁电存储器的工艺进行了详细的研究，完成了铁电存储器的整个工艺流程。发现作为上电极的Pt与PZT薄膜的粘附性比较差，用丙酮超声清洗时上 — —IV—— ＼电极的Pt大面积与PZT薄膜剥离。在500℃下退火30分钟后，Pt与PZT薄膜的粘附性得到大幅度改善。 6在对铁电电容的模型进行了初步的研究后，在Hspice中实现了零反转时间瞬态铁电电客模型（ ZSTT model）。采用 ZSTT模型对 IC／IT铁电存储单元的读写时序进行了模拟，并对铁电存储器中的铁电电客面积进行优化。更多还原

【Abstract】 High speed, low voltage and radiation-hardness are main three advantages presented by SQl technology over bulk. Since the cost to produce 501 materials was high in the past, the application of SOT materials was limited in military industry and aerospace to fabricate high temperature and radiation-hardness circuits. With the fast development of mobile communication and portable electronic products, SQL will be the mainstream of IC technology in low-voltage and low-power application. Since SQL is one of the key technologies of microelectronics in national defense, American and other western countries embargo it to China in long time. Supported by innovation of the reative projects?of the Chinese Academy of Sciences, we have studied the process of CMOS/SQL devices, and fabricated CMOS/SOT twelve-bit Digital-to-Analog converter and eight-bit Analog-to-Digital converter. According to the task of the National Advanced Materials Committee of China, We have also investigated FeRAM that has important applicable prospect in the information field as the other part of my paper. FeRAM is a kind of nonvolatile memories. Compared with E2PROM, FeRAM has advantages including fast writes, high-write endurance and low power. The research of FeRAM is a focus in the Integrated Ferroelectrics. The main work of the paper is as below: I Co-operated with Sichuan Institute of Solid-State Circuits, we have participated in the discussion and design of CMOS/SQL twelve-bit Digital-to-Analog converter and eight-bit Analog-to-Digital converter. 2.Investigated the process of CMOS/SQl devices. Through decreasing the thickness of the top silicon of SOT by oxidation several times, we have fabricated Full-Depleted MOS/SOT transistor successfully. Optimizing the doping process of MOS/SOI transistor, we find that the value and distribution of implantation energy are the most important factors that influence the doping. We found out the optimized conditions for boron ions implantation are: the thickness of SiO2, which act as the buffer layer, is 20-3Onm; the energy of implantation and the dose of boron are 4Okev and 4-8 x 1012/cm2, respectively. 3. Optimizing the process of CMOS/SQl circuits under the research of MOS/SOL devices. Working together with Sichuan Institute of Solid-State Circuits, we have fabricated CMOS/SQL twelve-bit Digital-to-Analog converter and eight-bit Analog-to-Digital converter successfully using the 501 substrate. The result of the Functional measurement of converters indicates that performance of the circuits reaches our expected functions. 4.Designed 4 x 8 bit FeR.AM(LC/TT) by ourselves, and finished the layout of it. 5.Investigated the process of FeRAM. Complete the entire process of FeRAM, and find that the adhesion between Pt(top electrode) and PZT is not so good, and it becomes much better when the sample is annealed under 500 (30 minutes). 6.After investigating the model of Ferro electric capacitance, we realized the ZSTT model, simulated the behavior of read and write operation, optimized the area of the Ferro electric capacitance.更多还原