Effect of a deep virtual guard ring on performance of a miniaturized high-photosensitivity silicon single-photon avalanche diode

【摘要】 We developed a miniaturized high-sensitivity single-photon avalanche diode（SPAD） device based on 180 nm bipolar complementary metal–oxide–semiconductor double-diffused metal–oxide–semiconductor technology and investigated the effect of a deep virtual guard ring（VGR） on device performance. To mitigate the degradation in photon detection efficiency（PDE） and dark count rate（DCR） induced by device scaling, we innovatively implemented a P-type implant/high-voltage n-well SPAD structure. This configuration deepens and widens the multiplication region to broaden the spectral response,while the specialized adoption of the P-type epitaxial VGR technology suppresses premature edge breakdown and reduces dark noise. Furthermore, a unique layout was devised to maximize the photosensitive area and increase the fill factor of the device. Through technology computer-aided design simulations, the effect of the guard ring width on the electric field distribution inside the device was systematically studied. Experimental results demonstrate that the fill factor of the device reaches 31.5% when the pitch is scaled down to 8.5 ??m. The novel device achieves a high peak PDE of 24% at 555 nm and an ultralow DCR of 0.41 cps·??m^-2 at 5 V excess bias voltage.更多还原

【Abstract】 We developed a miniaturized high-sensitivity single-photon avalanche diode（SPAD） device based on 180 nm bipolar complementary metal–oxide–semiconductor double-diffused metal–oxide–semiconductor technology and investigated the effect of a deep virtual guard ring（VGR） on device performance. To mitigate the degradation in photon detection efficiency（PDE） and dark count rate（DCR） induced by device scaling, we innovatively implemented a P-type implant/high-voltage n-well SPAD structure. This configuration deepens and widens the multiplication region to broaden the spectral response,while the specialized adoption of the P-type epitaxial VGR technology suppresses premature edge breakdown and reduces dark noise. Furthermore, a unique layout was devised to maximize the photosensitive area and increase the fill factor of the device. Through technology computer-aided design simulations, the effect of the guard ring width on the electric field distribution inside the device was systematically studied. Experimental results demonstrate that the fill factor of the device reaches 31.5% when the pitch is scaled down to 8.5 ??m. The novel device achieves a high peak PDE of 24% at 555 nm and an ultralow DCR of 0.41 cps·??m^-2 at 5 V excess bias voltage.更多还原