【摘要】 忆阻器不仅能够用于数据存储，还可以构建多种逻辑电路实现存内计算，有望成为打破“存储墙”瓶颈的核心基础器件。然而在大规模复杂电路设计场景中，现有的单逻辑域忆阻逻辑综合方案缺乏灵活性，综合后生成的电路各项性能难以满足设计需求。本文提出一种面向忆阻器蕴含逻辑和忆阻器非-蕴含逻辑的双逻辑域综合优化方法，通过分析2种逻辑在对电路网表进行映射和调度时的规律特性，在技术独立优化阶段(Technology Independent Optimization)引入最小子结构重写、MUX析取/合取双态优选及多扇出集群节点协同优化策略，实现高性能图拓扑变换与调度。与ABC tool相比，本文所提出方法在映射后的节点数量上降低17.32%。与最新研究里的AND-OR方法相比，在调度时的面积开销方面降低61.5%。更多还原

【Abstract】 Memristors, originally exploited for nonvolatile storage, are now intensively investigated as logic primitives capable of in-memory computing, offering a promising solution to break the “memory wall”. However,when targeting the design of large and complex circuits, existing synthesis flows restricted to a single memristive logic lack the flexibility, leading to results that the performance metrics of circuits fall short of design targets. In this work, a dual-domain synthesis framework is proposed that synergistically combines memristor-based implication(IMP) logic and not-implication(N-IMP) primitives. By systematically analyzing their mapping and scheduling characteristics on circuit netlists, three cooperative strategies are introduced during the process of technologyindependent optimization: optimization for rewriting the minimal-substructure, disjunctive/conjunctive duality selection for multiplexers, and collective refactoring of multi-fan-out clusters. The proposed methods achieve highperformance graph topology transformation and scheduling. Experimental results show that, compared with ABC tool, the proposed methods achieve the reduction of number of nodes after mapping by 17.32%. Furthermore, the proposed methods achieve the improvement in area overhead by 61.5% during the process of scheduling, when compared with the state-of-the-art work(AND-OR).更多还原