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基于路径延迟故障序列的硬件木马检测方法

Hardware Trojan detection based on path delay fault sequence

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【作者】 伍远翔唐明胡一凡张吉良

【Author】 WU Yuan-xiang;TANG Ming;HU Yi-fan;ZHANG Ji-liang;Key Laboratory of Aerospace Information Security and Trusted Computing of Ministry of Education,School of Cyber Science and Engineering, Wuhan University;College of Semiconductors (College of Integrated Circuits), Hunan University;

【通讯作者】 唐明;

【机构】 武汉大学国家网络安全学院空天信息安全与可信计算教育部重点实验室湖南大学半导体学院(集成电路学院)

【摘要】 针对基于侧信道信号的硬件木马检测普遍面临的两类问题,即需要黄金芯片和信号测量成本大,提出一种利用路径延迟故障序列的检测方法。基于时序冲突时电路路径产生延迟故障的先后顺序,间接利用路径延迟之间相对大小关系产生芯片检测ID;检测不依赖于黄金芯片,且在大范围的环境变化和工艺偏差下具有稳定性;故障序列在芯片设计阶段仿真获得,无需额外硬件开销。对ISCAS-89基准和AES-128电路实例验证了检测的有效性,其可成功检测插入的两种类型硬件木马。

【Abstract】 The mainstream hardware Trojan detection based on side channel generally faces two problems of golden chip and delay measurement cost. As a solution, a detection method using delay fault sequence was proposed. Based on the sequence of circuit path delay faults in the case of timing conflict, the chip detection ID was generated by indirectly using the relative relationship between path delays, which did not depend on the golden chip, and remained unchanging in a wide range of environment variation and process deviations. The fault sequence was obtained by simulation in the chip design stage without additional hardware overhead. The effectiveness of the detection is verified in the ISCAS-89 benchmark and AES-128 circuit experiments. It can successfully detect two types of inserted hardware Trojans.

【基金】 国家自然科学基金项目(61972295、62122023、U20A20202);武汉市科技项目应用基础前沿专项基金项目(2019010701011407)
  • 【文献出处】 计算机工程与设计 ,Computer Engineering and Design , 编辑部邮箱 ,2024年01期
  • 【分类号】TP309;TN40
  • 【下载频次】87
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