【摘要】 针对高速宽带无线通信系统的需求,现有的离散傅里叶变换离散傅里叶变换(discrete Fourier transform,DFT)扩展正交频分复用实现方法在资源利用和计算速度方面存在局限性。为了解决这些问题,提出了一种基于Cooley-Tukey算法和Winograd-Fourier变换(WFTA)算法相结合的优化方案。通过算数优化减少了乘法器的使用,实现了1 024点快速傅里叶变换(fast Fourier transform,FFT)的基-2时间抽取(decimation-in-time,DIT)蝶形算法结构优化。同时引入了WFTA算法,利用移位化简操作,完成了3点DFT的资源分配。设计并优化了现场可编程门阵列(field-programmable gate array, FPGA)资源,成功实现了3 072点FFT在FPGA上的运行。FPGA仿真和平台测试的结果表明,相较于Xilinx LTE FFT IP核处理算法,该优化算法在乘法器资源消耗方面减少了24.96%,处理速度提升了14.07%。此外,该算法大幅度降低了FFT的计算复杂度,显著提升了离散傅里叶变换扩频正交频分复用(DFT-S-OFDM)系统中DFT的整体性能。综上所述,所提出优化算法为DFT-S-OFDM技术在实际通信系统中的高效实现提供了新的解决方案。更多还原

【Abstract】 Aiming at the requirements of high-speed broadband wireless communication systems, the existing discrete Fourier transform(DFT) extended orthogonal frequency division multiplexing implementation methods have limitations in resource utilization and calculation speed. To solve these issues, this paper proposes an optimization approach that combines the Cooley-Tukey algorithm with the Winograd Fourier transform algorithm(WFTA). Arithmetic optimizations were applied to reduce the use of multipliers, enabling the optimization of the radix-2 DIT butterfly structure for a 1 024-point fast Fourier transorm(FFT). Additionally, the WFTA algorithm was introduced, using shiftbased simplifications to optimize resource allocation for 3-point DFTs. FPGA resources were designed and optimized, resulting in the successful implementation of a 3 072-point FFT on an FPGA. The results of FPGA simulation and platform test show that, compared to the Xilinx LTE FFT IP core, the proposed optimization reduced multiplier resource consumption by 24.96% and increased processing speed by 14.07%. Moreover, this algorithm significantly reduced the computational complexity of the FFT, greatly enhancing the overall performance of DFT in DFT-S-OFDM system. In summary, the optimization proposed in this paper provides an efficient solution for implementing DFT-SOFDM technology in practical communication systems.更多还原