【摘要】 微型忆阻器为大脑神经网络的发展提供了新的机遇，简单而精确的忆阻器可以提高各种神经网络和运算电路的性能。以传统二端忆阻模型为基础，通过引入控制端口，设计了一种多端忆阻器，使忆阻器在电路设计和应用中更加灵活实用。鉴于多端忆阻器的电阻由金属区、低电阻区和高电阻区三部分组成，采用三段分片线性法来分别拟合这三个区域。通过推导忆阻器的公式和工作原理，建立了该忆阻器的模型，并对所构建的电路进行了磁滞曲线与逻辑电路测试。仿真结果表明：构建的多端忆阻器能够产生符合忆阻特性的滞回曲线，并且实现了组合逻辑电路功能。由于搭建的忆阻器电路仅由MOS管构成，与传统忆阻逻辑电路相比，所使用的元件数量降低了63.9%。更多还原

【Abstract】 Micro memristors provide new opportunities for the development of neural networks in the brain. Simple and precise memristors could enhance the performance of diverse neural networks and arithmetic circuits. Based on the traditional two-terminal memristor model, a multi-terminal memristor was designed by introducing a control port, which makes it more flexible and practical in circuit design and application. The resistance of the multi-terminal memristor has three parts, namely, the metal region, the low-resistance region, and the high-resistance region. Considering that, a three-segmented piecewise linear method was employed to accurately fit these three regions. By deducing the formula and explaining principle of the memristor, the model of the memristor was established, and the hysteresis curve and logic circuit was tested for the obtained circuit to ensure its correctness. The simulation results show that the constructed multi-terminal memristor can generate hysteresis curves that conform to memristor characteristics and realize combinational logic circuit functions. Since the constructed memristor circuit in this study is only composed of MOS tubes, the number of components used in the circuit is reduced by 63.9% compared to the conventional memristor logic circuits.更多还原