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适用于Flash型FPGA的宽范围输出负压电荷泵设计

Design of Wide Range Negative Output Voltage Charge Pump for Flash FPGA

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【作者】 吴楚彬高宏马金龙张章

【Author】 WU Chubin;GAO Hong;MA Jinlong;ZHANG Zhang;China Electronics Technology Group Corporation No.58 Research Institute;School of Microelectronics, Hefei University of Technology;

【通讯作者】 张章;

【机构】 中国电子科技集团公司第五十八研究所合肥工业大学微电子学院

【摘要】 在Flash型FPGA的编程、擦除和回读检验等操作中,需要对Flash单元提供不同的正负高压偏置。提出一种适用于Flash型FPGA的负压电荷泵,该电荷泵采用三阱Flash工艺,消除了衬偏效应和衬底漏电的影响。电荷泵主体采用双支路并联结构,级数为6级。通过参考电压产生电路提供不同的输入参考电压,并结合电荷泵控制系统,可以实现电荷泵输出电压的自由调节,满足Flash型FPGA编程、擦除的负压要求。基于0.13μm Flash工艺对电荷泵进行设计及流片,在200 p F负载电容下,实测得到-5.5 V输出的建立时间仅为8μs,输出纹波为72 m V,-17.5 V输出的建立时间为30μs,输出纹波仅为56 m V,满足Flash型FPGA操作要求。

【Abstract】 It is necessary to provide different positive and negative high voltage biases for Flash cells during operations such as programming, erasing, and read-back checking of Flash FPGA. A negative voltage charge pump for Flash FPGA is proposed, which adopts triple-well Flash process to eliminate the influence of substrate bias and substrate leakage. The main body of the charge pump adopts a double-branch parallel structure with 6 stages. Different input reference voltages are provided by the reference voltage generation circuit, and combined with the charge pump control system, the output voltage of the charge pump can be freely adjusted to meet the negative voltage requirements for Flash FPGA programming and erasing. The charge pump is designed and taped out based on 0.13 μm Flash process. Under a 200 p F load capacitor, the measured setting time of the-5.5 V output is only 8 μs with an output ripple of 72 m V, while the-17.5 V output has a setting time of 30 μs and an output ripple of only 56 m V, meeting the operational requirements of Flash FPGA.

  • 【文献出处】 电子与封装 ,Electronics & Packaging , 编辑部邮箱 ,2024年07期
  • 【分类号】TN791
  • 【下载频次】20
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