【摘要】 本文依据28 nm Polarfire FPGA内部资源布局特点对两种SET脉冲宽度检测电路进行结构设计。以故障注入方式，从时间分辨率、检测精度、宽度测量阈值、死时间以及资源占用这5个TDC电路功能指标出发，研究两种SET脉冲宽度检测电路的差异，并分析影响SET脉冲宽度检测电路的因素。结果表明：在Polarfire FPGA中，当两种检测电路的理论SET脉冲宽度检测范围相同时(86～1 000 ps),可变延时脉冲宽度检测电路的资源占用相对较小，但检测精度比抽头延时脉冲宽度检测电路低约43 ps,检测阈值高约200 ps,且存在有1.4 ns的死时间。综合对比结果，在Polarfire FPGA中检测宽脉冲(>344 ps)选用抽头延时脉冲宽度检测电路，而窄脉冲选用可变延时脉冲宽度检测电路进行检测。更多还原

【Abstract】 SET pulse-width, as an important parameter of single event transient effect(SET), is closely related to SET’s ability to cause digital circuit faults. Based on the internal layout characteristics of the 28 nm Polarfire FPGA, two types of SET pulse-width measurement circuits are designed. By using fault injection method, the time resolution, detection accuracy, width measurement threshold, dead time and the resource occupation of five time to digital converter(TDC) of circuit functional indicators are compared between the variable temporal pulse-width detection circuit and the tap delay pulse-width detection circuit. The results show that in Polarfire FPGA, when the theoretical SET pulse-width detection range from 86 ps to 1000 ps of the two detection circuits, the resource occupation of the variable temporal pulse-width detection circuit is relatively small, but its detection accuracy is about 43 ps lower than that of the tap delay pulse-width detection circuit, the detection threshold is about 200 ps higher than that of the tap delay pulse-width detection circuit, and there is a dead time of 1.4 ns. The comparison results indicate that when the pulse widths >344 ps in Polarfire FPGA, a tap delay pulse-width detection circuit is selected, while a variable temporal pulse-width detection circuit is used for detecting narrow pulses.更多还原