【摘要】 目前市场上的大地电磁仪所使用的单个ADC(Analog to Digital Converter)的采样范围无法满足大地电磁法可用频率的采集，通常采用两个不同频率范围的ADC来满足广范围频率的采集，但采用两种不同的采集卡使得大地电磁仪功耗增加、体积变大，不方便进行野外采集。为了减少仪器功耗、体积，本文以ADS1282模数转换器为例提出一种在单个采集卡内部数字滤波的基础上级联基于FPGA(Field Programmable Gate Array)的线性偶对称结构FIR(Finite Impulse Response Digital Filter)低通抽取滤波器的方案，减少了系统处理的数据量，同时使其在满足原有ADC频率范围的基础上满足更低的频率采集。为了实现高倍抽取滤波，利用Matlab的滤波设计模块FDAtool设计出抽取数为128倍、总阶数为1 395的低通抽取滤波器，并在Simulink及FPGA上进行仿真计算，证明了其功能的可实现性。为了验证该滤波器是否可嵌入大地电磁仪采集系统中，将设计好的高阶低通高倍抽取滤波器植入基于FPGA的大地电磁仪接收机采集控制系统中，对控制系统进行功耗及资源占用分析，得出各类资源最大占用比为25%、总功耗为1.952 W,表明该设计方案不仅满足更低频采集，而且可基于FPGA实现。更多还原

【Abstract】 At present, the sampling range of a single ADC(analog to digital converter) used in magnetotelluric instruments in the market cannot meet the acquisition needs of available frequencies of magnetotelluric methods. Usually, two ADCs with different frequency ranges are used to meet the acquisition requirements of a wide range of frequencies. However, the use of two different acquisition cards increases the power consumption and volume of magnetotelluric instruments, which is inconvenient for field collection. In order to reduce the power consumption and volume of the instrument, based on FPGA(field programmable gate array) and illustrated by the example of ADS1282 analog to digital converter, this paper proposes a scheme of cascading FIR(fine impulse response digital filter) low-pass decimation filter with the digital filter of a single acquisition card, which reduces the amount of data processed by the system and enables it to meet the original ADC frequency range and lower frequency acquisition. In order to realize high decimation filtering, a low-pass decimation filter with decimation number of 128 times and total order of 1 395 is designed by using the filter design module FDAtool of Matlab, and the simulation calculation on simulink and FPGA proves its functional realizability and FPGA-based realizability. In order to verify whether the filter can be embedded in the acquisition system of magnetotelluric instrument, the designed high-order low-pass high-power decimation filter is embedded in the acquisition control system of magnetotelluric instrument receiver based on FPGA, and the power consumption and resource occupancy of the control system are analyzed. The maximum occupancy ratio of all kinds of resources is 25%, and the total power consumption is 1.952 W, which shows that the design scheme not only meets the requirements of lower frequency collection, but also can be effectively realized on FPGA.更多还原