【摘要】 针对sinc插值模块处理流式数据时消耗缓存大、运算效率低等问题，提出了针对流式数据的sinc插值设计方案，在对算法流程进行分析优化的基础上，针对数据特性提出了相应的架构优化，并给出了具体的FPGA实现，最后通过仿真与板上测试验证了设计的可行性。实验结果表明，该计算模块在处理一般尺寸图像数据时，通过率可接近100%。本设计避免了通用的sinc插值实现架构存在的消耗资源多、数据运算周期长等问题，兼顾了硬件的高性能与低复杂度，存在一定的应用价值。更多还原

【Abstract】 Refering to the large cache consumption and low computational efficiency during the process of sinc interpolation module handling streaming data, an optimized design scheme is presented. Based on the analysis of algorithm flow, the proposed scheme first puts forward an corresponding architecture optimization according to the data characteristics and then gives the specific FPGA implementation. The feasibility of the design is also verified through simulation and board test. The experimental results indicate that the passing rate of this scheme can approach 100% when this module processes image data of common sizes. The proposed scheme avoids several problems of the general sinc interpolation architecture, such as large resource consumption, long data operation cycle and so on. It also takes into account the high performance and low complexity of the hardware, which has certain practical application value.更多还原